參數(shù)資料
型號: TDA1373H
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: General Digital Input GDIN
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-319-1, QFP-64
文件頁數(shù): 30/40頁
文件大?。?/td> 308K
代理商: TDA1373H
1996 Jul 17
30
Philips Semiconductors
Product specification
General Digital Input (GDIN)
TDA1373H
S
ERIAL INPUT INTERFACES
(see Fig.7)
t
r
t
f
t
suDAT
t
hDAT
t
suWS
t
hWS
T
BCK
t
HB
t
LB
S
ERIAL OUTPUT INTERFACES
rise time (unless otherwise specified)
fall time (unless otherwise specified)
set-up time data (D) to clock (C)
hold time data (D) to clock (C)
set-up time word select (W) to clock (C)
hold time word select (W) to clock (C)
clock period time
bit clock HIGH time
bit clock LOW time
T
cy
0
T
cy
0
T
cy
T
cy
1/f
BCK
25
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
see Table 3
t
r
t
f
t
suDAT
t
hDAT
t
suWS
t
hWS
T
BCK
t
HB
t
LB
B
ITSTREAM INPUTS
AIL
AND
AIR (see Fig.8)
rise time (unless otherwise specified)
fall time (unless otherwise specified)
set-up time data (D) to clock (C)
hold time data (D) to clock (C)
set-up time word select (W) to clock (C)
hold time word select (W) to clock (C)
clock period time
bit clock HIGH time
bit clock LOW time
0.5t
BCK
T
cy
0.5t
BCK
T
cy
0.4t
BCK
0.4t
BCK
1/f
BCK
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
see Table 3
t
d1
delay time after HIGH-to-LOW clock
transition
100
ns
B
ITSTREAM OUTPUTS
AOL1, AOR1
AND
CLD (see Fig.8)
t
r
t
f
t
su
t
h
t
r
t
f
t
CH
t
CL
data output rise time
data output fall time
data output set-up time
data output hold time
clock output rise time
clock output fall time
clock output HIGH time
clock output LOW time
0
25
40
40
10
10
5
5
15
15
10
10
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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