參數(shù)資料
型號(hào)： TDA1373H
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： General Digital Input GDIN
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-319-1, QFP-64
文件頁(yè)數(shù)： 24/40頁(yè)
文件大?。?/td> 308K
代理商： TDA1373H
1996 Jul 17
24
Philips Semiconductors
Product specification
General Digital Input (GDIN)
TDA1373H
2.
3.
4.
5.
6.
VA = IEC 958 V-bit or ADIC error detector.
Only valid when the digital PLL works in adaptive mode.
After approximately 512 stereo input samples (approximately 10 ms when f
si
= 44.1 kHz).
Only valid in SRC mode. LF15 to LF0 are in two’s complement notation.
Only valid when IEC 958 input format is consumer (bit 0 of register STS5; CPF = 0). When the input format is
professional (CPF = 1) the STS5 and STS6 registers contain the first 16 bits of C-block.
Generation status (L-bit).
7.
Command registers
Table 10
Command registers
REGISTER
BIT
FLAG
DESCRIPTION
EXPLANATION
CMD1 (00H) ADIC
control
7 and 6
DI12 and DI11
ADIC input selector
00 = DI1S; 01 = DI1O;
10 = DI1D; 11 = reserved
0 = interrupt;
1 = user requirement
0 = hold buffer;
1 = set buffer free
00 = CD-Q; 01 = C-block;
10 = U-block; 11 = reserved
0 = left; 1 = right
0 = normal; 1 = test
00 = adaptive;
01 = state 1 fixed;
10 = state 2 fixed;
11 = state 3 fixed
00 = SRC mode;
01 = AD/DA mode;
10 = SLAVE-VCXO mode;
11 = SLAVE-VCO mode
0 = 3-state; 1 = enabled
0 = no reset; 1 = reset
0 = INS; 1 = ADIC
0 = ADIC; 1 = 128
×
filter
0 = FOW, FOD and FOC;
1 = DI2W, DI2D and DI2C
0 = variable hold; 1 = AIL/AIR
0 = output 128
×
down;
1 = output FIFO/GAIN
0 = variable hold;
1 = DI2W, DI2D and DI2C
0 = 128
×
down; 1 = 64
×
up
5
UIP
user interface protocol
4
SBF
set internal RAM buffer free
3 and 2
SM1 and SM0
channel decoding
1
0
7
6
LRS
DBA
C-block left/right selector
RAM buffer mode
reserved
reserved
PLL control; note 1
CMD2 (01H) loop
and mode control
5 and 4
LC1 and LC0
3 and 2
MS1 and MS0
mode selector; notes 1 and 2
1
0
7
6
5
4
RTR
MRS
DSO
FOS
DI2
enable 3-state outputs; note 3
reset (hardware reset); note 4
DO1 output selector
reserved
FO output selector
FIFO input selector
CMD3 (02H)
data path
(5)
3
2
DNI
INS
input selector 128
×
filter
In-band Noise Shaper input
selector
Bitstream digital filter input
selector
DO2 output selector
1
AOS
0
DO2
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