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參數(shù)資料
| 型號： | TDA1373H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | General Digital Input GDIN |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-319-1, QFP-64 |
| 文件頁數(shù)： | 16/40頁 |
| 文件大?。?/td> | 308K |
| 代理商： | TDA1373H |
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1996 Jul 17
16
Philips Semiconductors
Product specification
General Digital Input (GDIN)
TDA1373H
F
IRST
-I
N
F
IRST
-O
UT
(FIFO)
The incoming samples are buffered in a FIFO. The depth
of this FIFO determines the transients that can be allowed
in the input frequency, as they may occur during pitch
control. The FIFO has a depth of 8 samples, which makes
GDIN support a tracking speed of up to 4 kHz/ms. FIFO
overflow detection is provided to detect out-of-lock
situations.
G
AIN
C
ONTROL
At the begin of the data path, the signal level can be
controlled over a gain/attenuation range from 2 to 0 with a
step size of 2E-7. This gain control can be used for volume
control, gain correction and fade-in or fade-out. For normal
operation, the gain level should be set to 1-2E-7
(
0.068 dB) to avoid pass band ripple clipping in the digital
filters. Whenever a new gain value is set, the gain level is
increased or decreased by one step per input sample until
the new entered value is reached.
Setting the MMU control bit forces the GDIN to start a soft
muting. The gain is decreased, by one step per input
sample, to zero. Clearing the MMU bit will increase the
gain back to its original value. Only those outputs, for
which the signal passes through the ‘gain control’ part, are
muted.
64
×
UP
-
SAMPLING FILTER
A 64
×
(4
×
and 16
×
) oversampling filter is incorporated in
the GDIN for the SRC process. This filter can also be used
as the up-sampling filter for a Bitstream digital-to-analog
conversion in the AD/DA mode, in combination with the
Bitstream digital filter and Bitstream DAC (e.g. TDA1547).
Two filter characteristics can be chosen by the control bit
SS (see Table 4).
The 50 dB stop band suppression mode is especially
suited for 32 kHz input sources like Digital Satellite Radio
(DSR), where a very narrow transition band is required to
obtain 0 to 15 kHz pass band.
Table 4
Filter characteristics 64
×
up-sampling filter
SS
PASS BAND
STOP BAND
0
1
0 to 0.45351f
si
0 to 0.46875f
si
±
0.004 dB
±
0.004 dB
0.54648f
si
to 1f
si
0.53125f
si
to 1f
si
70 dB
50 dB
V
ARIABLE HOLD
In SRC mode, the variable hold is the interface between
the 64
×
up-sampling filters (64f
si
) and the
128
×
down-sampling filters (128f
so
). In SLAVE and AD/DA
modes, the variable hold holds each sample twice from
64f
si
to 128f
si
(f
si
= f
so
).
128
×
DOWN
-
SAMPLING FILTER
(see Fig.10)
After SRC, a 128
×
(32
×
+ 4
×
) down-sampling filter
decimates the signal to f
so
. In the AD/DA mode, this filter
is used as the ADC down-sampling filter for a Bitstream
sigma-delta modulator. The stop band suppression is
80 dB from 0.54648f
so
(e.g. 24.1 kHz at f
so
= 44.1 kHz).
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