參數(shù)資料
型號(hào)： TDA1373H
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： General Digital Input GDIN
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-319-1, QFP-64
文件頁(yè)數(shù)： 15/40頁(yè)
文件大?。?/td> 308K
代理商： TDA1373H
1996 Jul 17
15
Philips Semiconductors
Product specification
General Digital Input (GDIN)
TDA1373H
S
ERIAL DIGITAL OUTPUTS
DO1W, DO1D
AND
DO1C
Depending on the operating mode and data path
switching, DO1 can contain the output of the in-band noise
shaper or can be directly connected to the output of the
internal ADIC. The supported serial formats and modes of
this interface are given in Table 3.
In case the GDIN goes out-of-lock the output data is muted
and if the output is configured as master transmitter, the
word clock slips half a word clock period. If this is
undesirable, use the serial output as a slave transmitter.
S
ERIAL DIGITAL OUTPUTS
DO2W, DO2D
AND
DO2C
The additional digital audio output DO2 operates at 4f
so
.
DO2 can contain data of the up-sampling (not in SRC
mode) or down-sampling filters. The formats supported
are shown in Table 3.
S
ERIAL FEATURE OUTPUTS
FOW, FOD
AND
FOC
The internal ADIC output is directly available in I
2
S format
at this output. This makes it possible to switch a DSP
featuring IC in the data path before SRC (at f
si
). See
Table 3 for the formats supported.
handbook, full pagewidth
AIL and AIR
DATA
FOC, CLO4 and DO2C
CLOCK
Tcy
tf
tr
MLB961
CLD
CLOCK
AOL1, AOL2,
AOR1 and AOR2
DATA
tCL
tCH
td2
td3
VDD
1.0 V
td1
Fig.8 Timing diagram for the Bitstream inputs and outputs.
B
ITSTREAM INPUTS
AIL
AND
AIR
The Bitstream input receives data at 128f
so
from a 1-bit
sigma-delta modulator. Possible Bitstream inputs at 64f
so
are held twice. The timing diagram for the Bitstream inputs
and outputs is given in Fig.8.
B
ITSTREAM OUTPUTS
AOL1
AND
AOR1
The Bitstream output generates a 128 (SRC and SLAVE
modes) or 192 (AD/DA mode) times oversampled
Bitstream and can be connected to a Bitstream DAC (e.g.
TDA1547) for high-quality DAC. It is also possible to get
the inverted Bitstream signals on the complementary
Bitstream outputs AOL1 (pin DO2D) and AOR1
(pin DO2W) by setting the DLO control bit. By using a
simple low-pass filter, this symmetrical Bitstream output
can be used to make an inexpensive analog monitor
output. In that event the serial digital output DO2 cannot be
used.
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