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參數(shù)資料
| 型號(hào)： | ST62T45B |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS |
| 文件頁(yè)數(shù)： | 28/72頁(yè) |
| 文件大?。?/td> | 514K |
| 代理商： | ST62T45B |
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ST62T45B/E45B
IINTERRUPTS
(Cont’d)
3.4.2 Interrupt Procedure
The interrupt procedure is very similar to a call
procedure, indeed the user can consider the inter-
rupt as an asynchronous call procedure. As this is
an asynchronous event, the user cannot know the
context and the time at which it occurred. As a re-
sult, the user should save all Data space registers
which may be used within the interrupt routines.
There are separate sets of processor flags for nor-
mal, interrupt and non-maskable interrupt modes,
which are automatically switched and so do not
need to be saved.
The following list summarizes the interrupt proce-
dure:
MCU
– The interrupt is detected.
– The C and Z flags are replaced by the interrupt
flags (or by the NMI flags).
– The PC contents are stored in the first level of
the stack.
– The normal interrupt lines are inhibited (NMI still
active).
– The first internal latch is cleared.
–TheassociatedinterruptvectorisloadedinthePC.
WARNING:
In some circumstances, when a
maskable interrupt occurs while the ST6 core is in
NORMAL mode and especially during the execu-
tion of an ”ldi IOR, 00h” instruction (disabling all
maskable interrupts): if the interrupt arrives during
the first 3 cycles of the ”ldi” instruction (which is a
4-cycle instruction) the core will switch to interrupt
mode BUT the flags CN and ZN willNOT switch to
the interrupt pair CI and ZI.
User
– User selected registers are saved within the in-
terrupt service routine (normally on a software
stack).
– The source ofthe interrupt isfound by polling the
interrupt flags (if more than one source is asso-
ciated with the same vector).
– The interrupt is serviced.
– Return from interrupt (RETI)
MCU
– Automatically the MCU switches back to the nor-
mal flag set (or the interrupt flag set) and pops
the previous PC value from the stack.
The interrupt routine usually begins by the identi-
fying the device which generated the interrupt re-
quest (by polling). The user should save the regis-
ters which are used within the interrupt routine in a
software stack. After the RETI instruction is exe-
cuted, the MCU returns to the main routine.
Figure 16.Interrupt Processing Flow Chart
INSTRUCTION
FETCH
INSTRUCTION
EXECUTE
INSTRUCTION
THE IWAS
A RETI
CLEAR
INTERRUPT MASK
SELECT
PROGRAM FLAGS
”POP”
THE STACKED PC
CHECK IF THERE IS
AN INTERRUPT REQUEST
AND INTERRUPTMASK
SELECT
INTERNAL MODE FLAG
PUSH THE
PC INTO THE STACK
LOAD PC FROM
INTERRUPT VECTOR
(FFC/FFD)
SET
INTERRUPTMASK
NO
NO
YES
IS THE CORE
NALREADY IN
VA000014
YES
NO
YES
27
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| ST62T45BQ6 | 功能描述:8位微控制器 -MCU OTP EPROM 8K RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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