- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98080 > SII3114CTU PCI BUS CONTROLLER, PQFP176 PDF資料下載
參數(shù)資料
| 型號： | SII3114CTU |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP176 |
| 封裝： | TQFP-176 |
| 文件頁數(shù)： | 31/127頁 |
| 文件大小： | 564K |
| 代理商： | SII3114CTU |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁
SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
SiI-DS-0103-D
118
2007 Silicon Image, Inc.
EEPROM Memory Access
The SiI3114 supports an external 256-byte EEPROM memory device. Access to the EEPROM memory is
available through internal register operations in the SiI3114.
EEPROM Write Operation
Verify that bit 25 is cleared in the EEPROM Memory Address – Command + Status register at Offset 58H
of Base Address 5. The bit reads one when a memory access is currently in progress. It reads zero when
the memory access is complete and ready for another operation.
Write ‘1’ to clear bit 28 in the EEPROM Memory Address – Command + Status register. The bit is set if an
error occurred during a previous memory access.
Program the write address for the EEPROM memory access. The address field is defined by bits [07:00]
in the EEPROM Memory Address – Command + Status register. Program bits [15:08] to zero.
Program the write data for the EEPROM memory access. The data field is defined by bits [07:00] in the
EEPROM Memory Data register at Offset 5CH of Base Address 5.
Program the memory access type. The memory access type is defined by bit 24 in the EEPROM Memory
Address – Command + Status register. The bit must be cleared for a memory write access.
Initiate the EEPROM memory access by setting bit 25 in the EEPROM Memory Address – Command +
Status register.
Poll bit 25 in the EEPROM Memory Address – Command + Status register. The bit reads one when a
memory access is currently in progress. It reads zero when the memory access is complete.
Check bit 28 in the EEPROM Memory Address – Command + Status register. The bit is set if an error
occurred during a previous memory access.
EEPROM Read Operation
Verify that bit 25 is cleared in the EEPROM Memory Address – Command + Status register at Offset 58H
of Base Address 5. The bit reads one when a memory access is currently in progress. It reads zero when
the memory access is complete and ready for another operation.
Write ‘1’ to clear bit 28 in the EEPROM Memory Address – Command + Status register. The bit is set if an
error occurred during a previous memory access.
Program the read address for the EEPROM memory access. The address field is defined by bits [07:00]
in the EEPROM Memory Address – Command + Status register. Program bits [15:08] to zero.
Program the memory access type. The memory access type is defined by bit 24 in the EEPROM Memory
Address – Command + Status register. The bit must be set for a memory read access.
Initiate the EEPROM memory access by setting bit 25 in the EEPROM Memory Address – Command +
Status register.
Poll bit 25 in the EEPROM Memory Address – Command + Status register. The bit reads one when a
memory access is currently in progress. It reads zero when the memory access is complete.
Check bit 28 in the EEPROM Memory Address – Command + Status register. The bit is set if an error
occurred during a previous memory access.
Read the data from the EEPROM memory access. The data field is defined by bits [07:00] in the
EEPROM Memory Data register at Offset 5CH of Base Address 5.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SII3124ACBHU | PCI BUS CONTROLLER, PBGA364 |
| SII3512ECTU128 | PCI BUS CONTROLLER, PQFP128 |
| SII3531ACNU | PCI BUS CONTROLLER, QCC48 |
| SIO10N268-NU | MULTIFUNCTION PERIPHERAL, PQFP128 |
| SIS300 | GRAPHICS PROCESSOR, PBGA365 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SII3124A | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3124ACBHU | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3132 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI Express to 2-Port Serial ATA II Host Controller |
| SII3132CNU | 制造商:Silicon Image Inc 功能描述:PCI Express to Serial ATA Controller 88-Pin QFN |
| SII3512 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。