參數(shù)資料
型號: SII3114CTU
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PQFP176
封裝: TQFP-176
文件頁數(shù): 25/127頁
文件大?。?/td> 564K
代理商: SII3114CTU
SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
SiI-DS-0103-D
112
2007 Silicon Image, Inc.
Protocols Summary
The protocol encoding scheme is described in Table 45.
Table 45. Protocol Code Encoding Scheme
Protocol
Code
Protocol
Codes
Defined
Bit Assignment
00h
Abort
00h
-
01h-3Fh
A2h-AFh
B3h-BFh
E0h-EFh
F1h-FFh
-
Reserved
40h-4Fh
-
Vendor Specific
80h-8Fh
C0h-CFh
(1x00xxxxb)
PIO Data in/Out
80h, 81h,
82h, 87h,
88h, 89h,
8Ah, 8Bh,
8Fh, C0h,
C2h, C8h,
CAh
Bit 6:
0 - legacy addressing
1 - 48-bit LBA addressing
Bit 3:
0 - data in (read)
1 - data out (write)
Bits 2-0:
000b - sector count is given by the Sector Count register.
001b - only one sector, Sector Count is ignored.
010b - blocks of multiple sectors, e.g., Read/Write Multiple.
011b - sector count is given by Sector Number and Sector Count
registers, e.g. Download Microcode.
100b-110b - reserved
111b - 512 plus vendor specific bytes, e.g. Read/Write Long.
90h-9Fh
D0h-DFh
(1x01xxxxb)
DMA
90h, 91h,
98h, 99h,
D0h, D1h,
D8h, D9h
Bit 6:
0 - legacy addressing
1 - 48-bit LBA addressing
Bit 3:
0 - data in (read)
1 - data out (write)
Bits 2-1:
00b - currently defined
01b-11b - reserved.
Bit 0:
0 - not queued.
1 - queued.
A0h
Packet
A0h
-
A1h
Service
A1h
-
B0h,F0h
(1x110000b)
Non-Data
B0h, F0h
Bit 6:
0 - legacy addressing
1 - 48-bit LBA addressing
B1h
Execute Device Diagnostic
B1h
-
B2h
Device Reset
B2h
-
Descriptions of vendor specific protocol codes are described in Table 46 and Table 47.
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