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參數(shù)資料
| 型號： | SII3114CTU |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP176 |
| 封裝： | TQFP-176 |
| 文件頁數(shù)： | 111/127頁 |
| 文件大?。?/td> | 564K |
| 代理商： | SII3114CTU |
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SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
SiI-DS-0103-D
76
2007 Silicon Image, Inc.
In order to use the controller’s DMA capability to perform the data transfer for an ATA/ATAPI
command, the controller needs to be configured for the transfer mode to use when transferring
data to or from the ATA bus. The data transfer mode is set by programming bits [1:0] of the
Channel x Data Transfer Mode register. The transfer mode select values are listed below:
00B = PIO/Virtual DMA Mode (the "interface" between the device and the controller is setup for
"PIO mode", but the PCI interface is setup for DMA transfer).
10B = DMA Mode (the "interface" between the device and the controller is setup for "DMA mode",
and the PCI interface is also setup for DMA transfer).
Note: If the "interface" between the device and the controller is setup for "PIO mode", and the PCI
interface is also setup for PIO transfer, there is no need to change these two bits.
Issue ATA Command
The following describes the sequence to issue a read/write type command to an ATA device.
1.
Select the device. The device is selected by programming bits [23:16] in the Channel x Task File
Register 1 register.
2.
Set the number of sectors to be transferred by programming bits [23:16] of the Channel x Task File
Register 0 register.
3.
Set the location of data to be transferred. The location is defined by programming the following:
Bits [31:24] in the Channel x Task File Register 0 register define the Starting Sector.
Bits [23:16] in the Channel x Task File Register 1 register define the Device and Head value.
Bits [15:08] in the Channel x Task File Register 1 register define the Cylinder High value.
Bits [07:00] in the Channel x Task File Register 1 register define the Cylinder Low value.
4.
Issue the Read/Write PIO/DMA command by programming bits [31:24] in the Channel x Task File
Register 1 register with the command desired.
PIO Mode Read/Write Operation
Once the SiI3114 is initialized via the initialization sequence described in the “Recommended Initialization
Sequence for the SiI3114” section, the ATA device has been initialized for PIO mode data transfer per the
guidelines in the “Serial ATA Device Initialization” section, and the controller channel has been initialized for PIO
mode data transfer, PIO read/write operations may be performed by following the programming sequence
described below.
Issue a PIO Read/Write command to device following the steps in Issue ATA Command section above.
Read Operation
Wait until a channel interrupt (bit 11 in the Channel x Task File Timing + Configuration + Status register is
set).
Read the device status at bits [31:24] in the Channel x Task File Register 1 register to clear the device
interrupt and determine if there was error.
If no error, continue to read data via the Channel x Task File Register 0 register, until the expected
number of sectors of data per interrupt are read.
Repeat the above three steps until all data for the read command has been transferred or an error has
been detected.
Write Operation
Wait until bit 27(DRQ) in the Channel x Task File Register 1 register is set.
Continue to write data via the Channel x Task File Register 0 register until the expected number of
sectors of data per interrupt are written.
Wait until a channel interrupt (bit 11 in the Channel x Task File Timing + Configuration + Status register is
set).
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