
Rev. 4.00, 03/04, page 49 of 660
From any state when
RESETP
= 0
From any state but hardware standby
mode or bus-released state when
RESETM
= 0
Note:
*
The hardware standby mode is entered when the CA pin goes low level from any state.
RESETP
= 1
RESETM
= 1
RESETP
= 0
CA
= 1,
RESETP
=0
Power-on reset
state
Manual reset
state
Program execution state
Bus-released state
Sleep mode
Software standby mode
Hardware standby mode
*
Exception-handling state
Interrupt
Bus request
cBus request
Exception
interrupt
End of exception
transition
processing
Bus
request
Bus
request
clearance
SLEEP
instruction
with STBY
bit set
Interrupt
Reset state
Power-down state
SLEEP
instruction
with STBY
bit cleared
Busreques
Busreques cearance
Figure 2.6 Processor State Transitions