參數(shù)資料
型號： SAB-XC167CI-16F20F
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP144
封裝： 0.50 MM PITCH, PLASTIC, TQFP-144
文件頁數(shù)： 60/80頁
文件大?。?/td> 2477K
代理商： SAB-XC167CI-16F20F
XC167
Derivatives
Electrical Parameters
Data Sheet
59
V1.1, 2003-06
Preliminary
Sample time and conversion time of the XC167’s A/D Converter are programmable. In
compatibility mode, the above timing can be calculated using Table 14.
The limit values for
fBC must not be exceeded when selecting ADCTC.
Converter Timing Example:
Assumptions:
fSYS
= 40 MHz (i.e.
tSYS = 25 ns), ADCTC = ‘01’, ADSTC = ‘00’.
Basic clock
fBC
=
fSYS / 2 = 20 MHz, i.e. tBC = 50 ns.
Sample time
tS
=
tBC × 8 = 400 ns.
Conversion 10-bit:
With post-calibr.
tC10P = 52 × tBC + tS + 6 × tSYS = (2600 + 400 + 150) ns = 3.15 s.
Post-calibr. off
tC10
= 40
× t
BC + tS + 6 × tSYS = (2000 + 400 + 150) ns = 2.55 s.
Conversion 8-bit:
With post-calibr.
tC8P
= 44
× t
BC + tS + 6 × tSYS = (2200 + 400 + 150) ns = 2.75 s.
Post-calibr. off
tC8
= 32
× t
BC + tS + 6 × tSYS = (1600 + 400 + 150) ns = 2.15 s.
Table 14
A/D Converter Computation Table1)
1)
These selections are available in compatibility mode. An improved mechanism to control the ADC input clock
can be selected.
ADCON.15|14
(ADCTC)
A/D Converter
Basic Clock
fBC
ADCON.13|12
(ADSTC)
Sample time
tS
00
fSYS / 4
00
tBC × 8
01
fSYS / 2
01
tBC × 16
10
fSYS / 16
10
tBC × 32
11
fSYS / 8
11
tBC × 64
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