- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385814 > SAA7712 (NXP Semiconductors N.V.) Sound effects DSP PDF資料下載
參數(shù)資料
| 型號： | SAA7712 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Sound effects DSP |
| 中文描述： | DSP的音效 |
| 文件頁數(shù)： | 17/44頁 |
| 文件大?。?/td> | 178K |
| 代理商： | SAA7712 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
1999 Aug 05
17
Philips Semiconductors
Preliminary specification
Sound effects DSP
SAA7712H
Table 4
I
2
C-bus host_io_format bits (0FF9H, see Table 13)
Table 5
I
2
C-bus cloop_mode bits (0FF9H, see Table 13)
HOST_IO_FORMAT
OUTPUT
BIT 11
BIT 10
0
0
1
1
0
1
0
1
standard I
2
S-bus (default)
LSB-justified format, 16 bits
LSB-justified format, 18 bits
LSB-justified format, 20 bits
CLOOP_MODE
OUTPUT
BIT 15
BIT 14
0
0
1
1
BIT 13
0
1
0
1
0
1
bypass WS (default)
WS 50% duty factor
bypass BCLK (default)
divide BCLK by 2
divide BCLK by 4
divide BCLK by 8
8.3
Equalizer accelerator
8.3.1
I
NTRODUCTION
The equalizer accelerator is a hardware accelerator to the
DSP core. Both its inputs and outputs are stored in
registers of the DSP core.
The equalizer cannot be used and cannot be programmed
if no word select and bit clock signal are present on a
selected digital source input; see audio_source bit in
Table 3 (I
2
S_IN1 or I
2
S_IN2). The minimum required
DSP_clock is 481f
s
.
The equalizer accelerator contains one second-order filter
data path that is 20 times multiplexed. With this circuit, a
2-channel equalizer of 10 second-order sections per
channel or a 4-channel equalizer of 5 second-order
sections per channel can be realised. The centre
frequency, gain and Q-factor of all 20 second-order
sections can be set independently from each other. Every
sectionisfollowedbyaselectableattenuationof0 or 6 dB.
Per section, 4 bytes of the I
2
C-bus register are needed to
store the settings. The equalizer settings can be updated
during normal operation. An application program supports
the programming of the equalizer.
If the gain setting causes the audio signal to exceed the
maximum level in one of the filter sections, the signal will
be clipped and the equalizer overflow output (pin EQOV)
will be set HIGH until the end of the next audio sample
period.
8.3.2
C
ONFIGURATION OF EQUALIZER SECTIONS
The equalizer accelerator can make a 2-channel equalizer
of 10 second-order sections per channel or a 4-channel
equalizer of 5 second-order sections per channel.
The sections of one channel can be chained one after the
other. Depending on the I
2
C-bus control bit two_four
(see Table 11), the 20 filter sections are combined for the
appropriate configuration, as illustrated in Fig.8.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA8110G | Digital Signal Processor (DSP) for cameras(應(yīng)用于照相中的數(shù)字信號處理器) |
| SAA8122A | Digital Still Camera Processor (ImagIC family)(數(shù)字靜態(tài)照相處理器) |
| SAA8122AEL | Digital Still Camera Processor ImagIC family |
| SAB-C504-2R24M | 8-Bit CMOS Microcontroller |
| SAB-C504-2R40M | 8-Bit CMOS Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7712H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Sound effects DSP |
| SAA7715 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Signal Processor |
| SAA7715H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Signal Processor |
| SAA7724H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Car radio digital signal processor |
| SAA7740 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Processing IC DAPIC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。