參數(shù)資料
型號(hào): SAA7712
廠商: NXP Semiconductors N.V.
英文描述: Sound effects DSP
中文描述: DSP的音效
文件頁(yè)數(shù): 16/44頁(yè)
文件大小: 178K
代理商: SAA7712
1999 Aug 05
16
Philips Semiconductors
Preliminary specification
Sound effects DSP
SAA7712H
8.2.2
S
LAVE
I
2
S-
BUS INPUTS
The SAA7712H has two slave I
2
S-bus inputs, I
2
S_IN1 and
I
2
S_IN2 with respective data lines I
2
S_IN1_DATA and
I
2
S_IN2_DATA, word select lines I
2
S_IN1_WS and
I
2
S_IN2_WS and bit clock lines I
2
S_IN1_BCK and
I
2
S_IN2_BCK. The external source is master and supplies
the bit clock and word select. The I
2
C-bus bits
audio_format(2 to 0) allow for selection of the desired
I
2
S-bus format (see Table 13). The bits, needed for
selecting a certain format, are explained in Table 2.
The input circuitry is limited in handling the number of BCK
pulses per WS period. If the word rate of the selected
digital input source is f
s
, the bit clock must be a continuous
clock in the range of 16f
s
f
bit(CLK)
256f
s
. The minimum
limit of the audio sample frequency is determined by
1
18
f
SCL
. The maximum limit of the audio sample frequency
is determined by DSP_clock/481 Hz.
Table 2
I
2
C-bus audio_format mode bits (0FF9H,
see Table 13)
The selection of the DSP input among the decimated
analog input and the I
2
S-bus inputs I
2
S_IN1 and I
2
S_IN2
is controlled with I
2
C-bus bit audio_source (see Table 13).
The meaning of this bit can be found in Table 3.
AUDIO_FORMAT
OUTPUT
BIT 9
BIT 8
BIT 7
0
0
0
internal format (for test
purposes only)
LSB-justified, 16 bits
LSB-justified, 18 bits
LSB-justified, 20 bits
standard I
2
S-bus (default)
1
0
1
1
0
1
0
1
0
Table 3
I
2
C-bus audio_source mode bit (0FF9H,
see Table 13)
8.2.3
M
ASTER
I
2
S-
BUS INPUTS AND OUTPUTS
For the co-processor I/O interface, the SAA7712H acts as
a master. The SAA7712H supplies both the bit clock and
word select. The I
2
C-bus bits host_io_format(1 and 0)
allow for selection of the desired I
2
S-bus format (see
Table 13).
The bits needed for selecting a certain format are given in
Table 4.
All I
2
S-bus output lines, I
2
S_IO_WS, I
2
S_IO_BCK,
I
2
S_IO_OUT1 and I
2
S_IO_OUT2, can be 3-stated with
I
2
C-bus bit en_host_io (see Table 13).
The word select and bit clock of the co-processor I/O
interface are derived from the word select and bit clock of
the audio source selected according to Table 3.
The incoming bit clock can be divided by 1, 2, 4 or 8
depending on the needs of an external connected
co-processor. These selections can be done with I
2
C-bus
bits cloop_mode(2 to 0) (see Table 13). The meaning of
these bits is shown in Table 5.
AUDIO_SOURCE
OUTPUT
Bit 5
0
1
I
2
S_IN1 (default)
I
2
S_IN2
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