<tr id="pybbl"></tr>
參數(shù)資料
型號(hào)： S80486-DX4-75-S-V-8-B
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 75 MHz, MICROPROCESSOR, PQFP208
封裝： SQFP-208
文件頁(yè)數(shù)： 45/69頁(yè)
文件大?。?/td> 1070K
代理商： S80486-DX4-75-S-V-8-B
5
AMD
PRELIMINARY
Enhanced Am486 Microprocessor
4.8.9 BOFF During Write-Back ..................................................................................................... 32
4.8.10 Snooping Characteristics During a Cache Line Fill ........................................................... 32
4.8.11 Snooping Characteristics During a Copy-Back ................................................................. 32
4.9 Cache Invalidation and Flushing in Write-Back Mode .................................................................. 33
4.9.1 Cache Invalidation through Software .................................................................................. 33
4.9.2 Cache Invalidation through Hardware ................................................................................. 33
4.9.3 Snooping During Cache Flushing ........................................................................................ 34
4.10 Burst Write .................................................................................................................................. 34
4.10.1 Locked Accesses .............................................................................................................. 35
4.10.2 Serialization ....................................................................................................................... 35
4.10.3 PLOCK Operation in Write-Through Mode ........................................................................ 36
5
Clock Control ...................................................................................................................................... 36
5.1 Clock Generation .......................................................................................................................... 36
5.2 Stop Clock ..................................................................................................................................... 36
5.2.1 External Interrupts in Order of Priority ................................................................................. 36
5.3 Stop Grant Bus Cycle ................................................................................................................... 36
5.4 Pin State during Stop Grant .......................................................................................................... 37
5.5 Clock Control State Diagram ........................................................................................................ 37
5.5.1 Normal State ........................................................................................................................ 37
5.5.2 Stop Grant State .................................................................................................................. 37
5.5.3 Stop Clock State .................................................................................................................. 39
5.5.4 Auto Halt Power Down State ............................................................................................... 39
5.5.5 Stop Clock Snoop State (Cache Invalidations) .................................................................... 39
5.5.6 Cache Flush State ............................................................................................................... 39
6
SRESET Function ............................................................................................................................... 39
7
System Management Mode ................................................................................................................ 39
7.1 Overview ....................................................................................................................................... 39
7.2 Terminology .................................................................................................................................. 40
7.3 System Management Interrupt Processing ................................................................................... 40
7.3.1 System Management Interrupt Processing ......................................................................... 41
7.3.2 SMI Active (SMIACT) .......................................................................................................... 41
7.3.3 SMRAM ............................................................................................................................... 42
7.3.4 SMRAM State Save Map .................................................................................................... 43
7.4 Entering System Management Mode ............................................................................................ 44
7.5 Exiting System Management Mode .............................................................................................. 44
7.6 Processor Environment ................................................................................................................. 44
7.7 Executing System Management Mode Handler ............................................................................ 45
7.7.1 Exceptions and Interrupts with System Management Mode ............................................... 46
7.7.2 SMM Revisions Identifier ..................................................................................................... 46
7.7.3 Auto HALT Restart .............................................................................................................. 47
7.7.4 I/O Trap Restart ................................................................................................................... 47
7.7.5 I/O Trap Word ...................................................................................................................... 47
7.7.6 SMM Base Relocation ......................................................................................................... 48
7.8 SMM System Design Considerations ........................................................................................... 48
7.8.1 SMRAM Interface ................................................................................................................ 48
7.8.2 Cache Flushes .................................................................................................................... 49
7.8.3 A20M Pin ............................................................................................................................. 49
7.8.4 CPU Reset during SMM ...................................................................................................... 52
7.8.5 SMM and Second Level Write Buffers ................................................................................ 52
7.8.6 Nested SMI and I/O Restart ................................................................................................ 52
7.9 SMM Software Considerations ..................................................................................................... 52
7.9.1 SMM Code Considerations ................................................................................................. 52
7.9.2 Exception Handling ............................................................................................................. 52
7.9.3 Halt during SMM .................................................................................................................. 53
7.9.4 Relocating SMRAM to an Address above 1 Mbyte ............................................................. 53
相關(guān)PDF資料
PDF描述
S80960SA-16 32-BIT, 16 MHz, RISC PROCESSOR, PQFP80
S80960SB-10 32-BIT, 10 MHz, RISC PROCESSOR, PQFP80
S80C186XL12 16-BIT, 12 MHz, MICROPROCESSOR, PQFP80
S80C186XL25 16-BIT, 25 MHz, MICROPROCESSOR, PQFP80
S80C186XL20 16-BIT, 20 MHz, MICROPROCESSOR, PQFP80
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S8049CR4 WAF 制造商:Intel 功能描述:
S8049CRA4 WAF 制造商:Intel 功能描述:
S804PV-M63 制造商:ABB Control 功能描述:S 800 PV-M 4pole 63A (1200V dc) MCB
S804PV-S10 制造商:ABB Control 功能描述:MCB S 800 PV-S 4 POLE 10A (800VDC) 制造商:ABB Control 功能描述:MCB, S 800 PV-S 4 POLE 10A (800VDC)
S804PV-S16 制造商:ABB Control 功能描述:MCB S 800 PV-S 4 POLE 16A (800VDC) 制造商:ABB Control 功能描述:MCB, S 800 PV-S 4 POLE 16A (800VDC)
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*