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| 型號(hào)： | S1C88317D0A0100 |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, UUC170 |
| 封裝： | DIE-170 |
| 文件頁(yè)數(shù)： | 266/343頁(yè) |
| 文件大?。?/td> | 2396K |
| 代理商： | S1C88317D0A0100 |
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II-130
EPSON
S1C88348/317/316/308 TECHNICAL SOFTWARE
APPENDIX C PROGRAMMING NOTES
Appendix C
Programming Notes
During this period the
interrupts (including
NMI) are masked.
(3) When turning ON the OSC3 oscillation circuit
after switching the operating mode, you should
allow a minimum waiting time of 5 msec.
(4) Since several msec to several tens of msec are
necessary for the oscillation to stabilize after
turning the OSC3 oscillation circuit ON.
Consequently, you should switch the CPU
operating clock (OSC1
→ OSC3) after allowing
for a sufficient waiting time once the OSC3
oscillation goes ON. (The oscillation start time
will vary somewhat depending on the oscillator
and on the externally attached parts. Refer to
the oscillation start time example indicated in
Chapter 7/Technical Hardware, "ELECTRICAL
CHARACTERISTICS".)
(5) When switching the clock from OSC3 to OSC1,
be sure to switch OSC3 oscillation OFF with
separate instructions. Using a single instruction
to process simultaneously can cause a malfunc-
tion of the CPU.
Input Port (K Port)
When changing the input terminal from LOW level
to HIGH with the built-in pull-up resistor, a delay
in the waveform rise time will occur depending on
the time constant of the pull-up resistor and the
load capacitance of the terminal. It is necessary to
set an appropriate wait time for introduction of an
input port. In particular, special attention should be
paid to key scan for key matrix formation. Make
this wait time the amount of time or more calcu-
lated by the following expression.
Wait time = RIN x (CIN + load capacitance on the
board) x 1.6 [sec]
RIN: Pull up resistance Max. value
CIN: Terminal capacitance Max. value
Output Port (R port)
(1) Since the special output signals (CL, FR, TOUT,
FOUT and BZ) are generated asynchronously
from the output control registers (LCCLK,
LCFRM, PTOUT, FOUTON, BZON, BZSHT and
BZSTP), when the signals is turned ON or OFF
by the output control register settings, a hazard
of a 1/2 cycle or less is generated.
System Controller and Bus Control
(1) All the interrupts including NMI are masked,
until you write the optional value into both the
"00FF00H" and "00FF01H" addresses. Conse-
quently, even if you do not change the content
of this address (You use the initial value, as is.),
you should still be sure to perform the writing
operation using the initialization routine.
(2) When setting stack fields, including page
addresses as well, you should write them in the
order of the register SPP ("00FF01H") and the
stack pointer SP.
Example: When setting the "178000H" address
LD
EP, #00H
LD
HL, #0FF01H
LD
[HL], #17H
LD
SP, #8000H
Watchdog Timer
(1) The watchdog timer must reset within 3-second
cycles by software.
(2) Do not execute the SLP instruction for 2 msec
after a NMI interrupt has occurred (when fOSC1
is 32.768 kHz).
Oscillation Circuit and Operating Mode
(1) When the high speed CPU operation is not
necessary, you should operate the peripheral
circuits according to the setting outline indicate
below.
CPU operating clock
OSC1
OSC3 oscillation circuit
OFF
(When the OSC3 clock is not necessary
for some peripheral circuits.)
Operating mode
Low power mode
(When VDD–VSS is 3.5 V or less)
or Normal mode
(When VDD–VSS is 3.5 V or more)
(2) Do not turn the OSC3 oscillation circuit ON in
the low power mode.
Do not switch over the operating mode (normal
mode
high speed mode) in the OSC3 oscilla-
tion circuit ON status, as this will cause faulty
operation.
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