參數(shù)資料
型號: S-4561A
元件分類: 顯示控制器
英文描述: 16 X 60 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC166
封裝: 7.65 X 2 MM, DIE-166
文件頁數(shù): 7/48頁
文件大?。?/td> 427K
代理商: S-4561A
LCD Controller-Driver
S-4561A
Seiko Instruments Inc.
15
12.1
Doubler
Doubles the voltage through oscillating frequency of the CR Oscillating Circuit. The voltage is boosted from the VSS level and
output to VOUT. Capacitors between C1+ and C1- as well as between VSS and VOUT are connected.
Use the doubler in the
range of VDD
≤3.6 V.
12.2
LCD Voltage Adjustment Circuit
LCD drive voltage V can be adjusted by the following two voltage controllers:
R Voltage Regulator
Adjusts voltage regulator output VLCD by externally- divided resistors Ra and Rb.
VLCD can be calculated as the division ratio of the internal reference voltage VREF. VREF has temperature
characteristics of approx. 0.01%/ C and -0.13%/ C and the LCD temperature gradient can be compensated. VREF
differs depending upon the temperature characteristics of the reference voltage to select a command.
VLCD can be used as a “variable” by using the volume resistor as the divided resistor. Feedback voltage noises
occurring at VCNT pin directly affect VLCD. Take appropriate measures against noises.
Figure 10 Example of Booster Output
VDD=3 V
VSS=0 V
Doubled Voltage VOUT=6V
Ra+Rb
VLCD=
Ra
VREF (V)
VLCD
VCNT
VSS
Rb
Ra
VREF
+
-
Figure 11 Example of LCD Voltage Adjustment Circuit
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