參數(shù)資料
型號(hào): S-4561A
元件分類: 顯示控制器
英文描述: 16 X 60 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC166
封裝: 7.65 X 2 MM, DIE-166
文件頁(yè)數(shù): 18/48頁(yè)
文件大?。?/td> 427K
代理商: S-4561A
LCD Controller-Driver
S-4561A
Seiko Instruments Inc.
25
2.7 SMOOTH SCROLL CHARACTER SHIFT AMOUNT SETTING
Shift the required number of characters of the selected line to the smooth scroll line.
S4
S3
S2
S1
S0
Shift Amount
0
Does not shift.
00
1
1 character shifts left.
00
0
1
0
2 characters shift left.
::
1
0
16 characters shift left.
::
1
31 characters shift left.
2.8 ICONRAM ADDRESS SETTING
Set binary “A3A2A1A0” to the ICONRAM Address Counter.
After this command is executed, data is written from the CPU and read to ICONRAM. Write the mark display data which
corresponds to each address of the ICONRAM for every 5 bits.
2.9 ICON BLINK RAM ADDRESS SETTING
Set binary”A3A2A1A0” to the ICON BLINK RAM Address Counter. When writing “1” in the ICON BLINK RAM, the
respective marks blink. ICONRAM addresses correspond to respective ICON BLINK RAM addresses. After this command is
executed, data is written from the CPU and read to ICON BLINK RAM.
2.10 (TEST)
Testbits:D3
D
0 = all 0 at reset.
DO NOT write any values other than “0000” into this testbits.
RS
0
R/WX
0
DB7
1
DB6
0
DB5
1
DB4
S4
DB3
S3
DB2
S2
DB1
S1
DB0
S0
Extended
RS
0
R/WX
0
DB7
1
DB6
1
DB5
0
DB4
0
DB3
A3
DB2
A2
DB1
A1
DB0
A0
Extended
RS
0
R/WX
0
DB7
1
DB6
1
DB5
0
DB4
1
DB3
A3
DB2
A2
DB1
A1
DB0
A0
Extended
RS
0
R/WX
0
DB7
1
DB6
1
DB5
1
DB4
0
DB3
D3
DB2
D2
DB1
D1
DB0
D0
Extended
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