參數(shù)資料
型號(hào)： S-4561A
元件分類(lèi)： 顯示控制器
英文描述： 16 X 60 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC166
封裝： 7.65 X 2 MM, DIE-166
文件頁(yè)數(shù)： 36/48頁(yè)
文件大小： 427K
代理商： S-4561A
LCD Controller-Driver
S-4561A
Seiko Instruments Inc.
41
2.4 Reference Voltage Circuit
Table 32
Reference Voltage
VSS=0 V, VDD=3.0
±0.3 V, Ta=25 °C
3. Reference
Table 33
Input Pin Capacity
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Note
Input Pin Capacity
CIN
Ta=25
°C
-
5
8
pF
Note 4
Note 1
Sharp variation in the supply voltage or input signal voltage due to strange noises may lead to a malfunction of
the IC. Supply stable supply voltage and input signal voltage.
If you change the level of the supply voltage intentionally, a malfunction may occur. NEVER change the level of
the supply voltage.
Note 2
The maximum operating voltage of the logic is 5.5 V when an internal booster is not used.
Note 3
Pins RS, E, RWX, RESX, C86, P/SX, OSC1, FNC1, and FNC 2.
Pins D0 to D7 during display data write and command input.
Fully swing the levels VIH and VIL of the input signal within the range of power supply voltage so that the state is
VIH=VDD, VIL=VSS. When the level of VIH and VIL is the middle level of the supply voltage, the through-
current flowing through the input pin as well as the current consumption may be increased.
Note 4
Pins D0 to D7.
Note 5
Pins RS, E, RWX, RESX, C86, P/SX, FNC1, and FNC 2.
Note 6
Pins D0 to D7 during write and high-impedance.
Note 7
ON resistance between LCD drive output pins (SEG1 to SEG60, COM1 to COM16) and LCD drive bias voltage
pins (V1, V2, V3, V4). Measure the current which flows after applying a 0.1-V difference between the LCD
drive bias voltage pins (V1, V2, V3, V4) and LCD drive output pins in the external VLCD voltage input mode
(FNC1, 2=“HL”).
Note 8
Power save state. When turning the input pin to “Floating,” the through-current flows. Connect and fix the input
pins to VSS or VDD.
Note 9
Shows the current consumption during display including CR oscillation.
It includes the current consumed by the booster, LCD supply voltage adjustment circuit, voltage regulator, LCD
bias resistor when using the internal booster. The LCD drive output pin is no load. It does not include the
current consumed by the LCD panel and wiring capacitor. Measure it without access from the MPU.
Note 10
Shows the current consumption only for the logic during display including CR oscillation.
It does not include the current consumed by the LCD power supply systems, such as the booster, LCD supply
voltage adjustment circuit, and voltage regulator, when using the external LCD power supply. The LCD drive
output pin is no load. It does not include the current consumed by the LCD panel and wiring capacitor.
Measure it without access from the MPU.
Note 11
Shows the wait time from when the reset ends at the rising edge of the RESX to when normal operation is
possible.
Note 12
Specifies the minimum reset pulse width.
Note 13
Since the maximum output voltage of the booster is 7.2 V, the maximum operating voltage of the LCD power
supply circuit including the logic and the booster is 3.6 V.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Note
Reference Voltage
VREF
V
REF=0.01% /
°C
1.3
1.7
2.1
V
Note 23
V
REF=- 0.13% /
°C
1.3
1.7
2.1
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