參數(shù)資料
型號(hào): S-4561A
元件分類: 顯示控制器
英文描述: 16 X 60 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC166
封裝: 7.65 X 2 MM, DIE-166
文件頁數(shù): 16/48頁
文件大?。?/td> 427K
代理商: S-4561A
LCD Controller-Driver
S-4561A
Seiko Instruments Inc.
23
2.3 SELECT COM/SEG OUTPUT MODE, SELECT BIAS
The MLC determines how the common output waveform is output to COM (1-16) terminals.
MLC=0:
The common output waveform is output in the order of COM1, COM2,
NNN, COM15, COM16.
MLC=1:
The common output waveform is output in the order of COM16, COM15,
NNN, COM2, COM1.
The MLS determines how the segment output waveform is output to SEG (1-60) terminals.
The output form also varies depending upon N=0 or N=1.
[N=0 (2-line x 12-column) display]
MLS=0:
The segment output waveform to be displayed on the DDRAM addresses from 00 to 0B is output to
terminals from SEG1 to SEG60.
The segment output waveform to be displayed on the DDRAM addresses from 10 to 1B is output to
terminals from SEG1 to SEG60.
MLS=1:
The segment output waveform to be displayed on the DDRAM addresses from 00 to 0B is output to
terminals from SEG60 to SEG1.
The segment output waveform to be displayed on the DDRAM addresses from 10 to 1B is output to
terminals from SEG60 to SEG1.
[N=1 (1-line x 24-column) display]
MLS=0:
The segment output waveform to be displayed on the DDRAM addresses from 00 to 0B is output to
terminals from SEG1 to SEG60.
The segment output waveform to be displayed on the DDRAM addresses from 10 to 1B is output to
terminals from SEG60 to SEG1.
MLS=1:
The segment output waveform to be displayed on the DDRAM addresses from 00 to 0B is output to
terminals from SEG60 to SEG1.
The segment output waveform to be displayed on the DDRAM addresses from 10 to 1B is output to
terminals from SEG1 to SEG60.
Both the MLC and the MLS allow viewers to see characters correctly regardless of the mounting position of the IC to the LCD
panel (upper, lower, front or rear mounting position).
Determine the bias voltage for the LCD power supply circuit.
BS5
Select Bias
0
1/4 Bias
1
1/5 Bias
While the bias voltage is being externally determined, the booster, the LCD voltage adjustment circuit, the voltage follower,
and the bias circuit stop.
RS
0
R/WX
0
DB7
0
DB6
1
DB5
0
DB4
0
DB3
MLC
DB2
MLS
DB1
DB0
BS5
Extended
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