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參數(shù)資料
| 型號： | R1Q2A3609BBG-50RB |
| 元件分類： | SRAM |
| 英文描述： | 4M X 9 QDR SRAM, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, LEAD FREE, PLASTIC, LBGA-165 |
| 文件頁數(shù)： | 16/26頁 |
| 文件大?。?/td> | 341K |
| 代理商： | R1Q2A3609BBG-50RB |
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R1Q2A3636B/R1Q2A3618B/R1Q2A3609B
REJ03C0341-0003 Rev.0.03 Apr. 11, 2008
Page 23 of 24
ID Register
Part
Revision number
(31:29)
Type number
(28:12)
Vendor JEDEC code
(11:1)
Start bit
(0)
0 0MMM 0WW0 10Q0 B0S0
R1Q2A3636B
000
0 0010 0110 1010 0010
0100 0100 011
1
R1Q2A3618B
000
0 0010 0100 1010 0010
0100 0100 011
1
R1Q2A3609B
000
0 0010 0000 1010 0010
0100 0100 011
1
Notes: 1. Type number
MMM :Density
011:72Mb,
010:36Mb,
001:18Mb
WW :Organization
11: x 36,
10: x 18,
00: x 9,
01: x 8
Q
:QDR/DDR
1: QDR,
0: DDR
B
:Burst lengths
1: 4-word burst,
0: 2-word burst
S
:I/O
1: Separate I/O,
0: Common I/O
TAP Controller State Diagram
Select IR Scan
Capture IR
Shift IR
Exit1 IR
Pause IR
Exit2 IR
Update IR
0
1
0
1
0
1
0
1
Select DR Scan
Capture DR
Shift DR
Exit1 DR
Pause DR
Exit2 DR
Update DR
0
1
0
1
0
1
0
1
Run Test/Idle
0
10
1
Test Logic Reset
1
0
11
Notes:
The value adjacent to each state transition in this figure represents the signal present at TMS at
the time of a rising edge at TCK.
No matter what the original state of the controller, it will enter Test-Logic-Reset when TMS is held
high for at least five rising edges of TCK.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R1Q2A3609BBG-60R | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q2A3609RBG-40RB0 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q2A3609RBG-40RS0 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q2A3609RBG-40RT0 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q2A3609RBG-50RB0 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
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