參數(shù)資料
型號(hào): PSD913F2
英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
中文描述: 在8片位微控制器可配置存儲(chǔ)系統(tǒng)(用于8位微控制器的可配置存儲(chǔ)器系統(tǒng))
文件頁(yè)數(shù): 78/94頁(yè)
文件大?。?/td> 477K
代理商: PSD913F2
PSD9XX Family
Preliminary Information
74
-15
-20
Symbol
Parameter
Conditions
Min
Max
Min
Max
Unit
t
LVLX
t
AVLX
t
LXAX
ALE or AS Pulse Width
26
30
Address Setup Time
(Note 1)
10
12
ns
Address Hold Time
(Note 1)
12
14
ns
t
AVWL
Address Valid to Leading
Edge of WR
(Notes 1 and 3)
20
25
ns
t
SLWL
t
DVWH
t
WHDX
t
WLWH
t
WHAX1
CS Valid to Leading Edge of WR
(Note 3)
20
25
ns
WR Data Setup Time
(Note 3)
45
50
ns
WR Data Hold Time
(Note 3)
8
10
ns
WR Pulse Width
(Note 3)
48
53
ns
Trailing Edge of WR to Address Invalid
(Note 3)
12
17
ns
t
WHAX2
Trailing Edge of WR to DPLD Address
Input Invalid
(Notes 3 and 6)
0
0
ns
t
WHPV
Trailing Edge of WR to Port Output
Valid Using I/O Port Data Register
(Note 3)
35
40
ns
t
WLMV
WR Valid to Port Output Valid Using
Micro
Cell Register Preset/Clear
Data Valid to Port Output Valid
Using Micro
Cell Register Preset/Clear
Address Input Valid to Address
Output Delay
(Notes 3 and 4)
70
80
ns
t
DVMV
(Notes 3 and 5)
70
80
ns
t
AVPV
(Note 2)
35
40
ns
Write Timing
(3 V Versions)
NOTES:
1. Any input used to select an internal PSD9XX function.
2. In multiplexed mode, latched addresses generated from ADIO delay to address output on any Port.
3. WR timing has the same timing as E, LDS, UDS, WRL, and WRH signals.
4. Assuming data is stable before active write signal.
5. Assuming write is active before data becomes valid.
6. Address hold time for DPLD inputs that are used to generate chip selects for internal PSD memory.
Microcontroller Interface – PSD9XXFV AC/DC Parameters
(3 V Versions)
-15
-20
Slew
Rate
(Note 1)
Unit
PT
Aloc
TURBO
OFF
Symbol
Parameter
Conditions
Min
Max
Min
Max
PLD Input Pin/Feedback to
PLD Combinatorial Output
t
PD
45
50
Add 4 Add 20 Sub 6
ns
t
ARD
PLD Array Delay
Any Micro
Cell
29
33
Add 4
ns
PLD Combinatorial Timing
(3 V Versions)
NOTE:
1. Fast Slew Rate output available on PA[3:0], PB[3:0], and PD[2:0].
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PSD913F2-12B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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