參數(shù)資料
型號(hào): PSD913F2
英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
中文描述: 在8片位微控制器可配置存儲(chǔ)系統(tǒng)(用于8位微控制器的可配置存儲(chǔ)器系統(tǒng))
文件頁(yè)數(shù): 2/94頁(yè)
文件大?。?/td> 477K
代理商: PSD913F2
i
PSD9XX Family
PSD913F2 PSD934F2
Configurable Memory System on a Chip for 8-Bit Microcontrollers
Table of Contents
Introduction....................................................................................................................................................................1
In-System Programming (ISP) JTAG....................................................................................................................2
In-Application Programming (IAP) ........................................................................................................................2
Key Features.................................................................................................................................................................3
Block Diagram...............................................................................................................................................................4
PSD9XX Family.............................................................................................................................................................5
Architectural Overview...................................................................................................................................................6
Memory.................................................................................................................................................................6
Page Register.......................................................................................................................................................6
PLDs.....................................................................................................................................................................6
I/O Ports................................................................................................................................................................7
Microcontroller Bus Interface................................................................................................................................7
JTAG Port.............................................................................................................................................................7
In-System Programming.......................................................................................................................................8
Power Management Unit ......................................................................................................................................8
Development System ....................................................................................................................................................9
Pin Descriptions...........................................................................................................................................................10
Register Description and Address Offset ....................................................................................................................14
Functional Blocks ........................................................................................................................................................15
Memory Blocks ...................................................................................................................................................15
Main Flash and Secondary Flash Memory Description.................................................................................15
SRAM............................................................................................................................................................27
Memory Chip Selects....................................................................................................................................27
Page Register ...............................................................................................................................................30
PLDs...................................................................................................................................................................31
Decode PLD (DPLD).....................................................................................................................................33
General Purpose PLD (GPLD)......................................................................................................................33
Microcontroller Bus Interface..............................................................................................................................35
Interface to a Multiplexed 8-bit Bus...............................................................................................................35
Interface to a Non-multiplexed 8-bit Bus.......................................................................................................35
Microcontroller Interface Examples...............................................................................................................37
I/O Ports..............................................................................................................................................................42
General Port Architecture..............................................................................................................................42
Port Operating Modes...................................................................................................................................44
Port Configuration Registers (PCRs)............................................................................................................47
Port Data Registers.......................................................................................................................................49
Ports A and B – Functionality and Structure.................................................................................................49
Port C – Functionality and Structure.............................................................................................................51
Port D – Functionality and Structure.............................................................................................................51
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