參數(shù)資料
型號(hào)： PSD913F2
英文描述： Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
中文描述： 在8片位微控制器可配置存儲(chǔ)系統(tǒng)（用于8位微控制器的可配置存儲(chǔ)器系統(tǒng)）
文件頁數(shù)： 25/94頁
文件大?。?/td> 477K
代理商： PSD913F2
Preliminary Information
PSD9XX Family
21
9.1.1.6 Programming Flash Memory
Flash memory must be erased prior to being programmed. The MCU may erase Flash
memory all at once or by-sector, but not byte-by-byte. A byte of Flash memory erases to all
logic ones (FF hex), and its bits are programmed to logic zeros. Although erasing Flash
memory occurs on a sector basis, programming Flash memory occurs on a byte basis.
The PSD9XX main Flash and Secondary Flash memories require the MCU to send an
instruction to program a byte or perform an erase function (see Table 9).
Once the MCU issues a Flash memory program or erase instruction, it must check for the
status of completion. The embedded algorithms that are invoked inside the PSD9XX
support several means to provide status to the MCU. Status may be checked using any of
three methods: Data Polling, Data Toggle, or the Ready/Busy output pin.
9.1.1.6.1 Data Polling
Polling on DQ7 is a method of checking whether a Program or Erase instruction is in
progress or has completed. Figure 3 shows the Data Polling algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD9XX begins. The MCU then reads the location of the byte to be programmed in Flash
to check status. Data bit DQ7 of this location becomes the compliment of data bit 7of the
original data byte to be programmed. The MCU continues to poll this location, comparing
DQ7 and monitoring the Error bit on DQ5. When the DQ7 matches data bit 7 of the original
data, and the Error bit at DQ5 remains ‘0’, then the embedded algorithm is complete.
If the Error bit at DQ5 is ‘1’, the MCU should test DQ7 again since DQ7 may have changed
simultaneously with DQ5 (see Figure 3).
The Error bit at DQ5 will be set if either an internal timeout occurred while the embedded
algorithm attempted to program the byte or if the MCU attempted to program a ‘1’ to a bit
that was not erased (not erased is logic ‘0’).
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the byte that was written to Flash with
the byte that was intended to be written.
When using the Data Polling method after an erase instruction, Figure 3 still applies.
However, DQ7 will be ‘0’ until the erase operation is complete. A ‘1’ on DQ5 will indicate
a timeout failure of the erase operation, a ‘0’ indicates no error. The MCU can read any
location within the sector being erased to get DQ7 and DQ5.
PSDsoft will generate ANSI C code functions which implement these Data Polling
algorithms.
The
PSD9XX
Functional
Blocks
(cont.)
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PSD913F2-12B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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