參數(shù)資料
型號： PSD913F2
英文描述： Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
中文描述： 在8片位微控制器可配置存儲系統(tǒng)（用于8位微控制器的可配置存儲器系統(tǒng)）
文件頁數(shù)： 7/94頁
文件大?。?/td> 477K
代理商： PSD913F2
Preliminary Information
PSD9XX Family
A simple interface to 8-bit microcontrollers that use either multiplexed or
non-multiplexed busses. The bus interface logic uses the control signals generated by
the microcontroller automatically when the address is decoded and a read or write is
performed. A partial list of the MCU families supported include:
Intel 8031, 80196, 80186, 80C251
Motorola 68HC11, 68HC16, 68HC12, and 683XX
Philips 8031 and 8051XA
Zilog Z80, Z8, and Z180
Internal 1 or 2 Mbit flash memory. This is the main Flash memory. It is divided into
eight equal-sized blocks that can be accessed with user-specified addresses.
Internal secondary 256 Kbit Flash memory. It is divided into four equal-sized
blocks that can be accessed with user-specified addresses. This secondary memory
brings the ability to execute code and update the main Flash
concurrently.
16 or 64 Kbit SRAM. The SRAM’s contents can be protected from a
power failure by connecting an external battery.
General Purpose PLD (GPLD) with 19 outputs. The GPLD may be used to implement
external chip selects or combinatorial logic function.
Decode PLD (DPLD) that decodes address for selection of internal memory blocks.
27 individually configurable I/O port pins that can be used for the following functions:
MCU I/Os
PLD I/Os
Latched MCU address output
Special function I/Os.
16 of the I/O ports may be configured as open-drain outputs.
Standby current as low as 50 μA for 5 V devices.
Built-in JTAG compliant serial port allows full-chip In-System Programmability (ISP).
With it, you can program a blank device or reprogram a device in the factory or the
field.
Internal page register that can be used to expand the microcontroller address space by
a factor of 256.
Internal programmable Power Management Unit (PMU) that supports a low power
mode called Power Down Mode. The PMU can automatically detect a lack of
microcontroller activity and put the PSD9XX into Power Down Mode.
Erase/Write cycles:
Flash memory – 100,000 minimum
PLD – 1,000 minimum
Data Retention: 15 years
2.0
Key Features
3
相關PDF資料
PDF描述
PSD934F2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng))
PSD935G2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(8位微控制器片上存儲器可編程外設)
PSD935G2 CONFIGURABLE MEMORY SYSTEM ON A CHIP FOR 8-BIT MICROCONTROLLERS
PSD935G2V 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA package; Similar to IRHM57160 with optional Total Dose Rating of 300kRads
PSD935G2-B-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
相關代理商/技術參數(shù)
參數(shù)描述
PSD913F2-12B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD913F2-12JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*