參數(shù)資料
型號(hào)： PSD813F5V-20MT
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
封裝： PLASTIC, QFP-52
文件頁(yè)數(shù)： 39/103頁(yè)
文件大?。?/td> 1180K
代理商： PSD813F5V-20MT
PSD8XXF2/3/4/5
40/103
MCU BUS INTERFACE
The “no-glue logic” MCU Bus Interface block can
be directly connected to most popular MCUs and
their control signals. Key 8-bit MCUs, with their
bus types and control signals, are shown in Table
15. The interface type is specified using the PSD-
soft Express Configuration.
PSD8XXFX Interface to a Multiplexed 8-Bit
Bus. Figure 17 shows an example of a system us-
ing a MCU with an 8-bit multiplexed bus and a
PSD8XXFX. The ADIO port on the PSD8XXFX is
connected directly to the MCU address/data bus.
Address Strobe (ALE/AS, PD0) latches the ad-
dress signals internally. Latched addresses can
be brought out to Port A or B. The PSD8XXFX
drives the ADIO data bus only when one of its in-
ternal resources is accessed and Read Strobe
(RD, CNTL1) is active. Should the system address
bus exceed sixteen bits, Ports A, B, C, or D may
be used as additional address inputs.
Table 15. MCUs and their Control Signals
Note: 1. Unused CNTL2 pin can be configured as CPLD input. Other unused pins (PC7, PD0, PA3-0) can be configured for other I/O func-
tions.
2. ALE/AS input is optional for MCUs with a non-multiplexed bus
MCU
Data Bus
Width
CNTL0
CNTL1
CNTL2
PC7
PD02
ADIO0
PA3-PA0
PA7-PA3
8031
8
WR
RD
PSEN
(Note 1) ALE
A0
(Note 1)
80C51XA
8
WR
RD
PSEN
(Note 1) ALE
A4
A3-A0
(Note 1)
80C251
8
WR
PSEN
(Note 1) (Note 1) ALE
A0
(Note 1)
80C251
8
WR
RD
PSEN
(Note 1) ALE
A0
(Note 1)
80198
8
WR
RD
(Note 1) (Note 1) ALE
A0
(Note 1)
68HC11
8
R/W
E
(Note 1) (Note 1) AS
A0
(Note 1)
68HC912
8
R/W
E
(Note 1) DBE
AS
A0
(Note 1)
Z80
8
WR
RD
(Note 1) (Note 1) (Note 1) A0
D3-D0
D7-D4
Z8
8
R/W
DS
(Note 1) (Note 1) AS
A0
(Note 1)
68330
8
R/W
DS
(Note 1) (Note 1) AS
A0
(Note 1)
M37702M2
8
R/W
E
(Note 1) (Note 1) ALE
A0
D3-D0
D7-D4
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