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| 型號(hào)： | PM2329 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 23/162頁(yè) |
| 文件大小： | 1581K |
| 代理商： | PM2329 |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
’
Internal Use
Document ID: PMC-2010146, Issue 4
26
PM2329 ClassiPI Network Classification Processor Datasheet
Table 2
System Interface Signals
Signal Name
SCE0*
Ball #
V1
Size
1
I/O
Description
I
System Chip Enable 0 (Active Low)
This is the Chip Enable signal for the PM2329. It should
be driven active low for every read or write cycle to the
device.
System Chip Enable 1 (Active Low)
SCE1*
U2
1
I
This is the Chip Enable signal for the PM2329. It should
be driven active low for every read or write cycle to the
device.
System Chip Enable 2 (Active High)
SCE2
G2
1
I
This is the Chip Enable signal for the PM2329. It should
be driven active high for every read or write cycle to the
device.
System Address Bus
SA[15:3]
Refer
to
section
2.3
tables
2.3-2.4
13
I
Address bus to address the internal locations in the
PM2329.
SA[11:3] : These signals are used to address the
internal 64-bit registers of the PM2329
SA[14:12] : These 3 address lines must match the
CID# of the PM2329 for its internal registers to be
addressed as local registers.
SA[15] : If this address bit is asserted high during a
write cycle, the register addressed by SA[11:3] is
accessed irrespective of the value on SA[14:12]. A
Global write is performed in this manner.
Note: When the PM2329 is configured in 32-bit mode,
SA[2] is driven on the SWHE* signal.
System Data Bus
SD[63:0]
Refer
to
section
2.3
tables
2.2-2.3
64
I/O
All data transfers between the PM2329 and the
external system components take place on this bus.
When PM2329 is configured for 64-bit data bus width,
SD[63:0] should be tied to the external Packet
Processor.
When PM2329 is configured for 32-bit data bus width,
signals SD[63:32] are used, SD[31:0] should be left
open.
System Interrupt (Active Low)
SINT*
U1
1
O
Interrupt signal from PM2329 to the processor. In
cascaded applications, SINT* from PM2329 Zero
(CID=0) is connected to the processor, SINT* signals
from all other PM2329 devices are left open and
unconnected.
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