- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370008 > PM2329 Telecommunication IC PDF資料下載
參數(shù)資料
| 型號(hào)： | PM2329 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 114/162頁(yè) |
| 文件大小： | 1581K |
| 代理商： | PM2329 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)當(dāng)前第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
’
Internal Use
Document ID: PMC-2010146, Issue 4
117
PM2329 ClassiPI Network Classification Processor Datasheet
words will be written to Base 3 +0E0h, +0E8h and +0F0h and the EOP word will be written to +0F8h, as
required.
In case the transfer Direction is 1, block moves can still be used; however, the EOP D1 must be written at a
separate non-contiguous address using a separate write cycle.
When channels are concatenated, the EOP address of the concatenated channel is the EOP address of the
highest channel in the concatenated set. For example, if channels 0 through 3 are concatenated to form a
1K deep channel, address +000 through +3F0 act as non-EOP addresses and +3F8 will be the EOP D0
adderss.
If automatic header extraction is disabled for this packet, then the first two 64-bit words (or first four 32-bit
words) in the packet can contain pre-extracted header data for use with policies which inspect the packet
header. If the pre-extracted header is to be compatible with the FEE extracted header (so that the same
classification rules
may be applied to this packet), these words must be formatted as follows.
The Flags field is further defined as follows:
The Packet Input Buffer is organized as 32 segments of 256 bytes each. Regardless of the state of Enable
Multi-Channel Mode bit, packets are stored starting at segment boundaries.
In the single channel mode, up to 32 packets of up to 256 bytes each can be transferred into the Packet
Input Buffer. Note that if a packet exceeds 256 bytes, the next byte is placed in the next segment and the
full 256-byte segment is also assigned to this packet. As an example, if the processor downloads a 264-byte
packet, only 30 additional packets up to 256 bytes each can be input.
In the multi-channel mode, up to 32 packets of 256 bytes each can be input. For further information
regarding packet input in multi-channel mode, refer to the Channel Assignment register description.
1st Word
63.............................................32
SIP
63................48
SP
31................................................0
DIP
31.........24
Protocol
Flags
2nd Word
47.................32
DP
23...20
19...............0
(Reserved)
Bit Position
23
22
21
20
Flag
Reserved; set to 0
a
ACK
SYN
FIN
a. Regardless of the source of the header information (pre-extracted or on-
chip extraction), the DIR bit is always derived as described in the
Direction Specifier control bit description in Operation Control Register
and inserted into this bit position in the internal header holding register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PM239P | Analog Comparator |
| PM30RHC060 | TRANSISTOR | IGBT POWER MODULE | 3-PH BRIDGE | 600V V(BR)CES | 30A I(C) |
| PM3321-QC | DATA CROSS CONNECT|LDCC|84PIN|PLASTIC |
| PM355AJ | Voltage-Feedback Operational Amplifier |
| PM355AZ | Voltage-Feedback Operational Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM233-155.52M | 制造商:CONNOR-WINFIELD 制造商全稱:Connor-Winfield Corporation 功能描述:5.0x7.0mm Surface Mount LVPECL Clock Oscillator Series |
| PM2379-001 | 制造商:Delphi Corporation 功能描述:TAPE MARK WHT |
| PM238 | 制造商:PURDY 制造商全稱:PURDY 功能描述:AC Fans and Blowers |
| PM238-115-1751BT-4 | 制造商:INTERFAN 功能描述:Fan, AC, 115V, 172x150x51mm, Obround, 238CFM, 3100RPM, 55dBA, Terminal Block |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。