TM Family Datasheet Page 66 of 81 June 2009 – " />
參數(shù)資料
型號(hào)： PI7C9X20505GPBNDE
廠商： Pericom
文件頁數(shù)： 63/81頁
文件大?。?/td> 0K
描述： IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告： Copper Wire Change 26/Sept/2011
標(biāo)準(zhǔn)包裝： 90
系列： GreenPacket™
應(yīng)用： 封裝開關(guān)，5 端口/5 線道
接口： PCI Express
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（17x17）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 66 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
7.2.93
VC RESOURCE STATUS REGISTER (0) – OFFSET 158h
BIT
FUNCTION
TYPE
DESCRIPTION
15:0
Reserved
RO
Reset to 0000h.
16
Port Arbitration
Table Status
RO
When set, it indicates that any entry of the Port Arbitration Table is written by
software. This bit is cleared when hardware finishes loading values stored in
the Port Arbitration Table after the bit of “Load Port Arbitration Table” is set.
Reset to 0b.
17
VC Negotiation
Pending
RO
When set, it indicates that the VC resource is still in the process of
negotiation. This bit is cleared after the VC negotiation is complete.
Reset to 0b.
31:18
Reserved
RO
Reset to 0.
7.2.94
VC RESOURCE CAPABILITY REGISTER (1) – OFFSET 15Ch
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
Port Arbitration
Capability
RO
It indicates the types of Port Arbitration supported by the VC resource. The
Switch supports Hardware fixed arbitration scheme, e.g., Round Robin,
Weight Round Robin (WRR) arbitration with 128 phases (3~4 enabled ports)
and Time-based WRR with 128 phases (3~4 enabled ports). Note that the
Time-based WRR is only valid in VC1.
Reset to 00011001b.
13:8
Reserved
RO
Reset to 000000b.
14
Advanced Packet
Switching
RO
When set, it indicates the VC resource only supports transaction optimized
for Advanced Packet Switching (AS).
Reset to 0b.
15
Reject Snoop
Transactions
RO
This bit is not applied to PCIe Switch.
Reset to 0b.
22:16
Maximum Time
Slots
RO
It indicates the maximum numbers of time slots (minus one) are allocated for
Isochronous traffic. The default value may be changed by SMBus or
auto-loading from EEPROM.
Reset to 7Fh.
23
Reserved
RO
Reset to 0b.
31:24
Port Arbitration
Table Offset
RO
It indicates the location of the Port Arbitration Table (n) as an offset from the
base address of the Virtual Channel Capability register in the unit of DQWD
(16 bytes).
Reset to 08h for Port Arbitration Table (1)
7.2.95
VC RESOURCE CONTROL REGISTER (1) – OFFSET 160h
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
TC/VC Map
RW
(Exception
for bit0)
This field indicates the TCs that are mapped to the VC resource. Bit
locations within this field correspond to TC values. When the bits in this
field are set, it means that the corresponding TCs are mapped to the VC
resource. Bit 0 of this filed is read-only and must be set to “0” for the VC1.
The default value may be changed by SMBus or auto-loading from
EEPROM.
Reset to 00h.
15:8
Reserved
RO
Reset to 00h.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C9X20508GPANDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube
PI7C9X20508GPBEVB 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20508GPBNDE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20508GPNDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays
PI7C9X2G303ELAEVB 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA
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