TM Family Datasheet Page 22 of 81 June 2009 – " />
參數(shù)資料
型號: PI7C9X20505GPBNDE
廠商: Pericom
文件頁數(shù): 15/81頁
文件大?。?/td> 0K
描述: IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告: Copper Wire Change 26/Sept/2011
標準包裝: 90
系列: GreenPacket™
應(yīng)用: 封裝開關(guān),5 端口/5 線道
接口: PCI Express
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(17x17)
包裝: 托盤
安裝類型: 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 22 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
5.6.5 CPLD
CPLD queue is used for storing completion data. If the received TLP is of the completion type and is determined to
have payload coming with the header, the payload data would be put into CPLD queue. There are two CPLD queues
for VC0 and VC1 respectively.
5.7
TRANSACTION ORDERING
Within a VPPB, a set of ordering rules is defined to regulate the transactions on the PCI Express Switch including
Memory, IO, Configuration and Messages, in order to avoid deadlocks and to support the Producer-Consumer
model. The ordering rules defined in table 5-4 apply within a single Traffic Class (TC). There is no ordering
requirement among transactions within different TC labels. Since the transactions with the same TC label are not
allowed to map into different virtual channels, it implies no ordering relationship between the traffic in VC0 and
VC1.
Table 5-4 Summary of PCI Express Ordering Rules
Row Pass Column
Posted
Request
Read
Request
Non-posted Write
Request
Read
Completion
Non-posted Write
Completion
Posted Request
Yes/No1
Yes5
Read Request
No2
Yes
Non-posted Write Request
No2
Yes
Read Completion
Yes/No3
Yes
Non-Posted Write
Completion
Yes4
Yes
1. When the Relaxed Ordering Attribute bit is cleared, the Posted Request transactions including memory write and
message request must complete on the egress bus of VPPB in the order in which they are received on the ingress
bus of VPPB. If the Relaxed Ordering Attribute bit is set, the Posted Request is permitted to pass over other Posted
Requests occurring before it.
2. A Read Request transmitting in the same direction as a previously queued Posted Request transaction must
push the posted write data ahead of it. The Posted Request transaction must complete on the egress bus before the
Read Request can be attempted on the egress bus. The Read transaction can go to the same location as the Posted
data. Therefore, if the Read transaction were to pass the Posted transaction, it would return stale data.
3. When the Relaxed Ordering Attribute bit is cleared, a Read completion must ‘‘pull’’ ahead of previously
queued posted data transmitting in the same direction. In this case, the read data transmits in the same direction as
the posted data, and the requestor of the read transaction is on the same side of the VPPB as the completer of the
posted transaction. The posted transaction must deliver to the completer before the read data is returned to the
requestor. If the Relaxed Ordering Attribute bit is set, then a read completion is permitted to pass a previously
queued Memory Write or Message Request.
4. Non-Posted Write Completions are permitted to pass a previous Memory Write or Message Request transaction.
Such transactions are actually transmitting in the opposite directions and hence have no ordering relationship.
5. Posted Request transactions must be given opportunities to pass Non-posted Read and Write Requests as well
as Completions. Otherwise, deadlocks may occur when some older Bridges that do not support delayed transactions
are mixed with PCIe Switch in the same system. A fairness algorithm is used to arbitrate between the Posted Write
queue and the Non-posted transaction queue.
相關(guān)PDF資料
PDF描述
PI7C9X20508GPBNDE IC PCIE PACKET SWITCH 256BGA
PI7C9X440SLBFDE IC PCIE-TO-USB 2.0 CTRLR 128LQFP
PI7C9X442SLBFDE IC PCIE-TO-USB2.0 SWIDGE 128LQFP
PI7C9X7952AFDE IC PCIE-TO-UART BRIDGE 128LQFP
PI7C9X7954AFDE IC PCIE-TO-UART BRIDGE 128LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C9X20508GPANDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube
PI7C9X20508GPBEVB 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20508GPBNDE 功能描述:外圍驅(qū)動器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20508GPNDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays
PI7C9X2G303ELAEVB 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA