TM Family Datasheet Page 69 of 77 August 2009 – Re" />
參數(shù)資料
型號(hào)： PI7C9X20303ULAZPE
廠商： Pericom
文件頁數(shù)： 66/77頁
文件大?。?/td> 0K
描述： IC PCIE PACKET SWITCH 132TQFN
標(biāo)準(zhǔn)包裝： 168
系列： UltraLo™
應(yīng)用： 封裝開關(guān)，3 端口/3 線道
接口： PCI Express
封裝/外殼： 132-VFQFN 雙排裸露焊盤
供應(yīng)商設(shè)備封裝： 132-TQFN-EP（10x10）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X20303UL
3Port-3Lane PCI Express Switch
UltraLo
TM Family
Datasheet
Page 69 of 77
August 2009 – Revision 1.1
Pericom Semiconductor
9.4
BOUNDARY SCAN REGISTER
The boundary scan register has a set of serial shift-register cells. A chain of boundary scan cells is formed by
connected the internal signal of the PI7C9X20303UL package pins. The VDD, VSS, and JTAG pins are not
in the boundary scan chain. The input to the shift register is TDI and the output from the shift register is
TDO. There are 4 different types of boundary scan cells, based on the function of each signal pin.
The boundary scan register cells are dedicated logic and do not have any system function. Data may be
loaded into the boundary scan register master cells from the device input pins and output pin-drivers in
parallel by the mandatory SAMPLE and EXTEST instructions. Parallel loading takes place on the rising
edge of TCK.
9.5
JTAG BOUNDARY SCAN REGISTER ORDER
Table 9-3 JTAG boundary scan register definition
Boundary Scan
Register Number
Pin Name
Pin No
Type
Tri-state Control Cell
0
NC
B4
Input
4
1
PRSNT[2]
A5
Bidir
4
2
NC
B5
Bidir
4
3
TEST5
A7
Bidir
4
Control
5
TEST4
B6
Bidir
4
6
TEST3
A8
Bidir
4
7
SMBCLK
B7
Bidir
4
8
SMBDATA
B8
Bidir
4
9
PWR_SAV
A10
Bidir
4
10
DEQ[3]
B9
Bidir
4
11
GPIO[0]
B10
Bidir
12
Control
13
GPIO[1]
A12
Bidir
14
Control
15
GPIO[2]
A13
Bidir
16
Control
17
GPIO[3]
B11
Bidir
18
Control
19
GPIO[4]
A14
Bidir
20
Control
21
GPIO[5]
B12
Bidir
22
Control
23
GPIO[6]
A15
Bidir
24
Control
25
GPIO[7]
B13
Bidir
26
Control
27
TEST1
A17
Bidir
4
28
HIDRV
B15
Bidir
4
29
LOWDRV
A18
Bidir
4
30
DTX[3]
B18
Bidir
4
31
EECLK
A23
Output2
32
EEPD
B19
Bidir
33
Control
34
PERST_L
A25
Input
35
PWR_IND[1]
Output2
36
PWR_IND[3]
Output2
37
PORTERR[0]
A26
Output2
38
ATT_IND[1]
Output2
39
ATT_IND[3]
Output2
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PI7C9X20303ULAZPEX 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3port 3lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20404GPANBE 制造商:Pericom Semiconductor Corporation 功能描述:4PORT 4LANE PCIE PACKETSWITCH - Trays
PI7C9X20404GPBNBE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4port 4lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20404SLCEVB 制造商:Pericom Semiconductor Corporation 功能描述:PCIE 4 PORT SWITCH EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20404SLCFDE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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