
Resets and Interrupts
MFR4200 Data Sheet, Rev. 0
Freescale Semiconductor
51
NOTE
TXENn signals for the
FlexRay Optical/Electrical PHY
are multiplexed
with TXENn_485 signals for the RS485 interfaces. Therefore, additional
external inverters are required for these signals in the RS485 mode.
2.4.6
Power Mode
No power saving features are implemented in the MFR4200; the device operates only in power mode.
2.5
Resets and Interrupts
2.5.1
Overview
All possible MFR4200 internal interrupt sources are combined and provided to the host by means of one
available interrupt line: INT_CC#. Refer to
Chapter 3, “MFR4200 FlexRay Communication Controller
”
for more information on available interrupt sources. The type of interrupt is level sensitive.
MFR4200 has the following resets:
external hard reset input signal RESET#.
internal power-on and low-voltage resets provided by the internal voltage regulator (refer to
Chapter 5, “Clocks and Reset Generator
” and
Chapter 4, “Dual Output Voltage Regulator
(VREG3V3V2)
” for more information).
2.5.2
Resets
When a reset occurs, MFR4200 registers and control bits are changed to known startup states. Refer to the
respective module chapters for register reset states for information of the different kind of resets and for
register reset states.
2.5.2.1
I/O Pins
Refer to
Chapter 3, “MFR4200 FlexRay Communication Controller
” for configuration of MFR4200 pins
out of reset.
2.5.3
Interrupt Sources
All interrupt sources available in the MFR4200 are controlled and indicated by the following registers:
Interrupt status register 0 (ISR0)
Interrupt enable register 0 (IER0)
Startup interrupt status register (SISR)
Startup interrupt enable register (SIER)
For more information on interrupt sources, refer to
Chapter 3, “MFR4200 FlexRay Communication
Controller
.