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參數(shù)資料
| 型號： | pentium II |
| 廠商： | Intel Corp. |
| 英文描述： | pentium II processor With On-die Cache Mobile Module Connector 1 (MMC-1)(帶緩存和連接器1的奔II處理器) |
| 中文描述： | 奔騰II處理器芯片上緩存手機模塊連接器1（MMC管理- 1）（帶緩存和連接器1的奔二處理器） |
| 文件頁數(shù)： | 32/34頁 |
| 文件大?。?/td> | 582K |
| 代理商： | PENTIUM II |
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32
Intel
a
Pentium
a
II Processor With On-die Cache Mobile Module MMC-1
NOTE:
Values shown are for
reference only
.
Figure 8. Overcurrent Protection Circuit
4.7.4.1
In Figure 8, PWR is the voltage generated by applying the
AC Adaptor or Battery. M1 is a low R
DS
(on) P-Channel
MOSFET such as a Siliconix* SI4435DY. When the voltage-
On PWR is applied and increased to over 4.75 volts, the
Slew-rate Control: Circuit Description
UNDER_VOLTAGE_LOCKOUT circuit allows R4 to pull up
the gate of M3 to start a turn-on sequence. M3 pulls its drain
toward ground, forcing current to flow through R2. M1 will
not start to source any current until after t_delay with t_delay
defined as:
t_delay
R.
Vt
Vgs_max
Vpwr
Vgs_max
.
R16
R16 R2
Vpwr
The manufacturer’s Vgs_max specification of 20 volts must
never be exceeded. However, Vgs_max must be high
enough to keep the RDS (On) of the device as low as
possible. After the initial t_delay, M1 will begin to source
current and V_DC will start to ramp up. The ramp up time,
t_ramp, is defined as:
t_ramp
R.
Vsat
Vgs_max
t_delay
Maximum current during the voltage ramping is:
I
.
CtotalVpwr
t_ramp
As shown in the circuit in Figure 8: t_delay = 5.53 ms; t_tran = 14.0 ms; and I_max = 146 mA.
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