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參數(shù)資料
| 型號(hào)： | PCF8548 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 65 x 102 pixels matrix LCD driver |
| 中文描述： | 65 × 102像素矩陣LCD驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 24/40頁 |
| 文件大?。?/td> | 206K |
| 代理商： | PCF8548 |
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1999 Aug 16
24
Philips Semiconductors
Product specification
65
×
102 pixels matrix LCD driver
PCF8548
16 AC CHARACTERISTICS
V
DD1
= 1.9 to 5.5 V; V
DD2
and V
DD3
= 2.4 to 4.5 V; V
SS1
and V
SS2
= 0 V; V
LCD
= 4.5 to 9 V; T
amb
=
40 to +85
°
C;
unless otherwise specified.
Notes
1.
2.
3.
4.
RES may be LOW before V
DD1
goes HIGH.
If t
W(RES)
is longer than 3 ns (typical) a reset may be generated.
All timing values are valid within the operating supply voltage and ambient temperature ranges and are referenced
to V
IL
and V
IH
with an input voltage swing of V
SS
to V
DD
.
The rise and fall times specified here refer to the driver device (i.e. not PCF8548) and are part of the general fast
I
2
C-bus specification. When PCF8548 asserts an acknowledge on SDA, the minimum fall time is 10 ns.
C
b
= capacitive load per bus line.
The device inputs SDA and SCL are filtered and will reject spikes on the bus lines of width <t
SW(max)
.
5.
6.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
f
OSC
oscillator frequency
V
DD1
= 2.8 V;
T
amb
=
20 to +70
°
C
20
38
70
kHz
f
clk(ext)
f
frame
external clock frequency
frame frequency
20
38
73
100
kHz
Hz
f
OSC
or f
clk(ext)
= 38 kHz;
note 1
see Fig.17 and note 2
see Fig.17 and note 3
t
VHRL
t
W(RES)
V
DD1
to RES LOW
RES LOW pulse width
0
100
1
μ
s
ns
I
2
C-bus timing characteristics;
see note 4
f
SCLK
t
SCLL
t
SCLH
t
SU;DAT
t
HD;DAT
t
r
t
f
t
f(SDA)(ro)
C
b
SCL clock frequency
SCL clock LOW period
SCL clock HIGH period
data set-up time
data hold time
SCL and SDA rise time
SCL and SDA fall time
SDA fall time for read out
capacitive load represented by each
bus line
set-up time for a repeated START
condition
START condition hold time
set-up time for STOP condition
tolerable spike width on bus
bus free time between a STOP and
START condition
0
1.3
0.6
100
0
20 + 0.1C
b
20 + 0.1C
b
20 + 0.1C
b
400
0.9
300
300
1000
400
kHz
μ
s
μ
s
ns
μ
s
ns
ns
ns
pF
note 5
note 5
V
DD1
= <3.6 V
t
SU;STA
0.6
μ
s
t
HD;STA
t
SU;STO
t
SW
t
BUF
0.6
0.6
1.3
50
μ
s
μ
s
ns
μ
s
note 6
f
frame
f
520
)
------------------
=
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PCF8548U/2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8548U/9 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8549 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8549U | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8549U/2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
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