參數(shù)資料
型號： NCP5322A
廠商： ON SEMICONDUCTOR
英文描述： TWO-PHASE BUCK CONTROLLER WITH INTEGRATED GATE DRIVERS AND 5-BIT DAC
中文描述： 兩相降壓控制器，它集成柵極驅(qū)動器和5位DAC
文件頁數(shù)： 28/32頁
文件大?。?/td> 1091K
代理商： NCP5322A
NCP5322A
http://onsemi.com
28
RDRP
VDRP
(IBIASVFB
227 mV (5.0 A
VOUT,FULL
–
LOADRFBK1)
35 mV 6.04 k )
21.0 k
(31)
7. Current Sensing
Choose the current sense network (R
CSn
, C
CSn
, n = 1 or 2)
to satisfy:
RCSn
CCSn
Lo (RL
RPCB)
(32)
Equation 32 will be most accurate for better iron powder
core material (such as the
–
8 from Micrometals). This
material is very consistent with DC current and frequency.
Less expensive core materials (such as the
–
52 from
Micrometals) change their characteristics with DC current,
AC flux density, and frequency. This material will yield
acceptable converter performance if the current sense time
constant is set lower (longer) than anticipated. As a rule of
thumb, use approximately twice the resistance (R
CSn
) or
twice the capacitance (C
CSn
) when using the less expensive
core material.
The component values determined thus far are Lo = 1.1
μ
H,
R
L
= 1.03 m
, and R
PCB
= 0.50m
. We choose a convenient
value for C
CS1
(0.01
μ
F) and solve for R
CS1
;
RCSn
1.1 H (1.03 m
0.50 m ) 0.01 F
71 k
Equation 32 will be most accurate for higher quality iron
powder core materials such as the
–
2 or
–
8 from
Micrometals. The permeability of these more expensive
cores is relatively constant versus DC current, AC flux
density and frequency. Less expensive core materials (such
as the
–
52 from Micrometals) change their characteristics
versus DC current, AC flux density, and frequency. The less
expensive materials may yield acceptable converter
performance if the current sense time constant is set
approximately 1
×
–
2
×
longer than anticipated. For example,
use up to twice the resistance (R
CSn
) or twice the capacitance
(C
CSn
) when using the less expensive core material. If we
use
–
52 material for this design, the value of R
CSn
may need
to be increased to 2
×
71 k
or 142 k
.
After the circuit is constructed, the values of R
CSn
and/or
C
CSn
should be tuned to provide a
“
square
–
wave
”
at V
DRP
with minimal overshoot and fast rise time due to a step
change in load current as shown in Figures 20
–
22.
8. Error Amplifier Tuning
The error amplifier is tuned by adjusting C
AMP
to provide
an acceptable full
–
load transient response as shown in
Figures 23
–
25. After a value for C
AMP
is chosen, the
peak
–
to
–
peak voltage ripple on the COMP pin is examined
under full
–
load to insure less than 20 mV
PP
as shown in
Figure 26.
9. Current Limit Setting
The maximum inductor resistance, the maximum PCB
resistance, and the maximum current
–
sense gain as shown
in Equation 34 determine the current limit. The maximum
current, I
OUT,LIM
, was specified in the design requirements.
The maximum inductor resistance occurs at full
–
load and
the highest ambient temperature. This value was found in the
“
Output Inductor Section
”
(1.06 m
). This analysis
assumes the PCB resistance only increases due to the change
in ambient temperature. Component heating will also
increase the PCB temperature but quantifying this effect is
difficult. Lab testing should be used to
“
fine tune
”
the
overcurrent threshold.
RPCB,MAX
0.50 m
(1
0.39%
C
(60
25) C)
0.57 m
VILIM
(IOUT,LIM
GILIM
ILo2)
(RLMAX
RPCB,MAX)
(52 A
8.03 A 2)
(1.33 m
0.57 m )
6.75 V V
0.718 Vdc
Set the voltage at the I
LIM
pin using a resistor divider from
the 3.3 V reference output as shown in Figure 28. If the
resistor from I
LIM
to GND is chosen as 1 k (R
LIM2
), the
resistor from I
LIM
to 3.3 V can be calculated from:
RLIM1
(VREF
(3.3 V
VILIM) (VILIMRLIM2)
0.718 V) (0.718 V 1 k )
3596
or 3.57 k
R
LIM2
1 k
R
LIM1
3.3 V
REF
To I
LIM
Pin
V
LIM
Figure 28. Setting the Current Limit
10. PWM Comparator Input Voltage
Use Equation 35 to check the voltage level to the positive
pin of the internal PWM comparators. The design should not
saturate the PWM comparator at maximum DAC output
voltage (+1% error), AVP at full
–
load, 100% duty cycle (D
= 1), and worst
–
case maximum internal ramp (310 mV at
100% duty cycle):
VCSREF,MAX
Max VID Setting w AVP @ Full
–
Load
1.01
1.850 V
30 mV
1.834 V
相關(guān)PDF資料
PDF描述
NCP5322ADW TWO-PHASE BUCK CONTROLLER WITH INTEGRATED GATE DRIVERS AND 5-BIT DAC
NCP5322ADWR2 STATIC PROTECTION RoHS Compliant: Yes
NCP5332ADW Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5332ADWR2 Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NCP5322A/D 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two-Phase Buck Controller with integrated Gate Drivers and 5-Bit DAC
NCP5322A_07 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
NCP5322ADW 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
NCP5322ADWG 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
NCP5322ADWR2 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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