參數(shù)資料
型號(hào)： NCP5322A
廠商： ON SEMICONDUCTOR
英文描述： TWO-PHASE BUCK CONTROLLER WITH INTEGRATED GATE DRIVERS AND 5-BIT DAC
中文描述： 兩相降壓控制器，它集成柵極驅(qū)動(dòng)器和5位DAC
文件頁數(shù)： 22/32頁
文件大?。?/td> 1091K
代理商： NCP5322A
NCP5322A
http://onsemi.com
22
–
+
+
–
G
VDRP
Σ
R
CS1
CS1
C
CS1
L1
0 A
+
–
G
VDRP
R
CS2
CS2
C
CS2
L2
0 A
CS
REF
COMP
Error
Amp
VID Setting
IBIAS
VFB
R
DRP
R
VFBK
V
DRP
= VID
V
FB
= VID
V
CORE
I
DRP
= 0
I
FBK
= IBIAS
VFB
V
CORE
= VID + IBIAS
VFB
R
VFBk
Figure 18. AVP Circuitry at No
–
Load
+
–
RFBK1
VNO
–
LOADIBIASVFB
(29)
Resistor R
DRP
is connected between the V
DRP
and the
V
FB
pins. At no
–
load, the V
DRP
and the V
FB
pins will both
be at the DAC voltage so this resistor will conduct zero
current. However, at full
–
load, the voltage at the V
DRP
pin
will increase proportional to the output inductor
’
s current
while V
FB
will still be regulated to the DAC voltage. Current
will be conducted from V
DRP
to V
FB
by R
DRP
. This current
will be large enough to supply the V
FB
bias current and cause
a voltage drop from V
FB
to Vcore across R
FBK
–
the
converter
’
s output voltage will be reduced. This condition is
shown in Figure 19.
To determine the value of R
DRP
the designer must specify
the full
–
load voltage reduction
from the VID
(DAC) setting
(
V
OUT,FULL
–
LOAD
) and predict the voltage increase at the
V
DRP
pin at full
–
load. Usually, the full
–
load voltage
reduction is specified in the design guide for the processor
that is available from the manufacturer. To predict the
voltage increase at the V
DRP
pin at full
–
load (
V
DRP
), the
designer must consider the output inductor
’
s resistance
(R
L
), the PCB trace resistance between the current sense
points (R
PCB
), and the controller IC
’
s gain from the current
sense to the V
DRP
pin (G
VDRP
):
VDRP
IO,MAX
(RL
RPCB)
GVDRP
(30)
The value of R
DRP
can then be calculated:
RDRP
VDRP
(IBIASVFB
VOUT,FULL
–
LOADRFBK1)
(31)
V
OUT,FULL
–
LOAD
is the full
–
load voltage reduction
from the VID (DAC) setting.
V
OUT,FULL
–
LOAD
is
not
the
voltage change from the no
–
load AVP setting.
7. Current Sensing
For inductive current sensing, choose the current sense
network (R
CSn
, C
CSn
, n = 1 or 2) to satisfy
RCSn
CCSn
Lo (RL
RPCB)
(32)
–
+
+
–
G
VDRP
Σ
R
CS1
CS1
C
CS1
L1
I
MAX
/2
+
–
G
VDRP
R
CS2
CS2
C
CS2
L2
I
MAX
/2
CS
REF
COMP
Error
Amp
VID Setting
IBIAS
VFB
R
DRP
R
VFBK
V
DRP
= VID +
I
MAX
R
L
G
VDRP
V
FB
= VID
V
CORE
I
DRP
I
FBK
V
CORE
= VID
–
(I
DRP
–
IBIAS
VFB
) R
VFBK
= VID
–
I
MAX
R
L
G
VDRP
R
FBK
/R
DRP
+ IBIAS
VFB
R
FBK
Figure 19. AVP Circuitry at Full
–
Load
I
DRP
= I
MAX
R
L
G
VDRP
/R
DRP
I
FBK
= I
DRP
–
IBIAS
VFB
+
–
相關(guān)PDF資料
PDF描述
NCP5322ADW TWO-PHASE BUCK CONTROLLER WITH INTEGRATED GATE DRIVERS AND 5-BIT DAC
NCP5322ADWR2 STATIC PROTECTION RoHS Compliant: Yes
NCP5332ADW Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5332ADWR2 Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5332A Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NCP5322A/D 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two-Phase Buck Controller with integrated Gate Drivers and 5-Bit DAC
NCP5322A_07 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
NCP5322ADW 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
NCP5322ADWG 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
NCP5322ADWR2 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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