參數(shù)資料
型號(hào)： NCP5322A
廠商： ON SEMICONDUCTOR
英文描述： TWO-PHASE BUCK CONTROLLER WITH INTEGRATED GATE DRIVERS AND 5-BIT DAC
中文描述： 兩相降壓控制器，它集成柵極驅(qū)動(dòng)器和5位DAC
文件頁(yè)數(shù)： 21/32頁(yè)
文件大?。?/td> 1091K
代理商： NCP5322A
NCP5322A
http://onsemi.com
21
I
D
V
GATE
V
DRAIN
Q
GD
Q
GS2
Q
GS1
V
GS_TH
Figure 17. MOSFET Switching Characteristics
I
g
is the output current from the gate driver IC.
V
IN
is the input voltage to the converter.
f
sw
is the switching frequency of the converter.
Q
G
is the MOSFET total gate charge to obtain R
DS(on)
.
Commonly specified in the data sheet.
V
g
is the gate drive voltage.
Q
RR
is the reverse recovery charge of the
lower
MOSFET.
Q
oss
is the MOSFET output charge specified in the data
sheet.
For the lower or synchronous MOSFET, the power
dissipation can be approximated from:
PD,SYNCH
(IRMS,SYNCH2
(Vfdiode
IO,MAX2
RDS(on))
t_nonoverlap
fSW)
(26)
The first term represents the conduction or IR losses when
the MOSFET is ON and the second term represents the diode
losses that occur during the gate non
–
overlap time.
All terms were defined in the previous discussion for the
control MOSFET with the exception of:
(27)
IRMS,SYNCH
(ILo,MAX2
[(1
D)
ILo,MAX
ILo,MIN
ILo,MIN2) 3]1 2
where:
Vf
diode
is the forward voltage of the MOSFET
’
s intrinsic
diode at the converter output current.
t_nonoverlap is the non
–
overlap time between the upper
and lower gate drivers to prevent cross conduction. This
time is usually specified in the data sheet for the control
IC.
When the MOSFET power dissipations are known, the
designer can calculate the required thermal impedance to
maintain a specified junction temperature at the worst case
ambient operating temperature
T
(TJ
TA) PD
(28)
where;
θ
T
is the total thermal impedance (
θ
JC
+
θ
SA
).
θ
JC
is the junction
–
to
–
case thermal impedance of the
MOSFET.
θ
SA
is the sink
–
to
–
ambient thermal impedance of the
heatsink assuming direct mounting of the MOSFET (no
thermal
“
pad
”
is used).
T
J
is the specified maximum allowed junction
temperature.
T
A
is the worst case ambient operating temperature.
For TO
–
220 and TO
–
263 packages, standard FR
–
4
copper clad circuit boards will have approximate thermal
resistances (
θ
SA
) as shown below:
Pad Size
(in
2
/mm
2
)
Single
–
Sided
1 oz. Copper
0.5/323
60
–
65
°
C/W
0.75/484
55
–
60
°
C/W
1.0/645
50
–
55
°
C/W
1.5/968
45
–
50
°
C/W
2.0/1290
38
–
42
°
C/W
2.5/1612
33
–
37
°
C/W
As with any power design, proper laboratory testing
should be performed to insure the design will dissipate the
required power under worst case operating conditions.
Variables considered during testing should include
maximum ambient temperature, minimum airflow,
maximum input voltage, maximum loading, and component
variations (i.e. worst case MOSFET R
DS(on)
). Also, the
inductors and capacitors share the MOSFET
’
s heatsinks and
will add heat and raise the temperature of the circuit board
and MOSFET. For any new design, its advisable to have as
much heatsink area as possible
–
all too often new designs
are found to be too hot and require re
–
design to add
heatsinking.
6. Adaptive Voltage Positioning
There are two resistors that determine the Adaptive
Voltage Positioning: R
FBK1
and R
DRP
. R
FBK1
establishes the
no
–
load
“
high
”
voltage position and R
DRP
determines the
full
–
load
“
droop
”
voltage.
Resistor R
FBK1
is connected between V
CORE
and the V
FB
pin of the controller. At no load, this resistor will conduct the
internal bias current of the V
FB
pin and develop a voltage
drop from V
CORE
to the V
FB
pin. Because the error amplifier
regulates V
FB
to the DAC setting, the output voltage,
V
CORE
, will be higher by the amount IBIAS
VFB
R
FBK1
.
This condition is shown in Figure 18.
To calculate R
FBK1
the designer must specify the no
–
load
voltage increase above the VID setting (
V
NO
–
LOAD
) and
determine the V
FB
bias current. Usually, the no
–
load voltage
increase is specified in the design guide for the processor
that is available from the manufacturer. The V
FB
bias current
is determined by the value of the resistor from R
OSC
to
ground (see Figure 5 in the data sheet for a graph of
IBIAS
VFB
versus R
OSC
). The value of R
FBK1
can then be
calculated:
相關(guān)PDF資料
PDF描述
NCP5322ADW TWO-PHASE BUCK CONTROLLER WITH INTEGRATED GATE DRIVERS AND 5-BIT DAC
NCP5322ADWR2 STATIC PROTECTION RoHS Compliant: Yes
NCP5332ADW Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5332ADWR2 Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
NCP5332A Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NCP5322A/D 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two-Phase Buck Controller with integrated Gate Drivers and 5-Bit DAC
NCP5322A_07 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
NCP5322ADW 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
NCP5322ADWG 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC
NCP5322ADWR2 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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