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參數(shù)資料
| 型號(hào)： | NCN6804MNR2G |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 17/25頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SMART CARD DUAL W/SPI 32-QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 應(yīng)用： | 智能卡 |
| 接口： | 4 線 SPI 串行 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 封裝/外殼： | 32-VFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 32-QFN（5x5） |
| 包裝： | 剪切帶 (CT) |
| 安裝類型： | 表面貼裝 |
| 其它名稱： | NCN6804MNR2GOSCT |
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NCN6804
http://onsemi.com
24
Input Schmitt Triggers
All the Logic Input pins have built in Schmitt trigger
circuits to protect the NCN6804 against uncontrolled
operation. The typical dynamic characteristics of the related
pins are depicted Figure 24.
Figure 24. Typical Schmitt Trigger Characteristic
OUTPUT
INPUT
VBAT
ON
OFF
0.3 VBAT
0.7 VBAT
VBA
T
Security Features
In order to protect both the interface and the external smart
card, the NCN6804 provides security features to prevent
irreversible failures as described here after.
Pin Current Limitation: In the case of a short circuit to
ground, the current forced by the device is limited to 15 mA
for any pins, except CRD_CLK A/B pin which is limited to
70 mA. No feedback is provided to the external MPU.
DC/DC Operation: The internal circuit continuously senses
the CRD_VCCA/B voltage; in the case of either over or
undervoltage situation it updates the READ_REG register
accordingly and forces the INT Pin to Low. This register can
be readout by the MPU.
Battery Voltage: Both the Over and Undervoltage are
detected by the NCN6804, the READ_REG register being
updated accordingly. The external MPU can read the register
through the MISO pin to take whatever is appropriate to
cope with the situation.
ESD Protection
The NCN6804 dual smart card interface features an
HBM ESD voltage protection (JEDEC standard) in excess
of 8 kV for all the CRD pins (CRD_IOA/B, CRD_CLKA/B,
CRD_RSTA/B, CRD_VCCA/B and GND). CRD_DETA/B
have a protection of 4 kV HBM. All the other pins
(microcontroller side) sustain at least 2 kV.
These values are guaranteed for the device in its full
integrity without considering the external capacitors added
to the circuit for a proper operating. Consequently in the
operating conditions it is able to sustain much more than
8 kV on its CRD pins making it perfectly protected against
electrostatic discharge well over the HBM ESD voltages
required by the ISO7816 standard.
Printed Circuit Board Layout
Careful layout routing will be applied to achieve a good
and efficient operating of the device in its application
environment and to fully exploit its performance. The
bypass capacitors have to be connected as close as possible
to the device pins (CRD_VCCA/B, VDD or VDDPA/B) in
order to reduce as much as possible parasitic behaviors
(ripple and noise). It is recommended to use ceramic
capacitors (very low ESR).
The exposed pad of the QFN32 package will be
connected to the ground. A relatively large ground plane is
recommended. Figure 25 shows a example of PCB device
implementation and component routing.
Figure 25. Example of PCB Device Implementation
VDD Decoupling
Capacitor 100 nF
LA 22 mH
VDDPA/B Decoupling
Capacitor 10 mF
LB 22 mH
CRD_VCCA Reservoir Capacitor
10 mF, 1210, X7R, 16 V
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