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參數(shù)資料
| 型號： | MT55L64L32F1 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 64K x 32,3.3V I/O, ZBT SRAM(2Mb,3.3V輸入/輸出，靜態(tài)RAM) |
| 中文描述： | 64K的x 32,3.3六/ O的ZBT SRAM的（處理器，3.3V的輸入/輸出，靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 406K |
| 代理商： | MT55L64L32F1 |
12
2Mb: 128K x 18, 64K x 32/36 3.3V I/O, Flow-Through ZBT SRAM
MT55L128L18F1_2.p65
–
Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
3.3V I/O, FLOW-THROUGH ZBT SRAM
State Diagram for ZBT SRAM
DESELECT
BEGIN
READ
BURST
READ
BEGIN
WRITE
DS
DS
DS
BURST
WRITE
READ
DS
WRITE
WRITE
BURST
READ
WRITE
READ
BURST
BURST
READ
BURST
DS
WRTE
KEY:
COMMAND
DS
READ
WRITE
BURST
OPERATION
DESELECT
New READ
New WRITE
BURST READ,
BURST WRITE or
CONTINUE DESELECT
BURST
READ
WRITE
NOTE:
1. A STALL or IGNORE CLOCK EDGE cycle is not shown in the above diagram. This is because CKE# HIGH only blocks the
clock (CLK) input and does not change the state of the device.
2. States change on the rising edge of the clock (CLK).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT55L64L36F1 | 64K x 36,3.3V I/O, ZBT SRAM(2Mb,3.3V輸入/輸出，靜態(tài)RAM) |
| MT55L64L36P1 | 64K x 36, 3.3V I/O, ZBT SRAM( 2Mb,3.3V輸入/輸出，靜態(tài)RAM) |
| MT58L128L18FT-10 | 2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128L18FT-6.8 | 2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128L18FT-7.5 | 2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT55L64L32F1T-10 | 制造商:Cypress Semiconductor 功能描述:64KX32 SRAM PLASTIC TQFP 3.3V |
| MT55L64L32F1T-12 | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 2M-Bit 64K x 32 9ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT55L64L32F1T-12IT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT55L64L32P1T10 | 制造商:MT 功能描述:New |
| MT55L64L36F1T-12 | 制造商:Cypress Semiconductor 功能描述:64KX36 SRAM PLASTIC TQFP 3.3V |
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