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參數(shù)資料
| 型號： | MT46V2M32LG |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DOUBLE DATA RATE DDR SDRAM |
| 中文描述： | 雙倍數(shù)據(jù)速率的DDR SDRAM內存 |
| 文件頁數(shù)： | 40/65頁 |
| 文件大?。?/td> | 2360K |
| 代理商： | MT46V2M32LG |
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40
64Mb: x32 DDR SDRAM
2M32DDR-07.p65
–
Rev. 12/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
64Mb: x32
DDR SDRAM
NOTES (continued):
3a. The READ with auto precharge enabled or WRITE with auto precharge enabled states can each be broken into two parts:
the access period and the precharge period. For READ with auto precharge, the precharge period is defined as if the
same burst was executed with auto precharge disabled and then followed with the earliest possible PRECHARGE
command that still accesses all of the data in the burst. For WRITE with auto precharge, the precharge period begins
when
t
WR ends, with
t
WR measured as if auto precharge was disabled. The access period starts with registration of the
command and ends where the precharge period (or
t
RP) begins.
During the precharge period of the READ with auto precharge enabled or WRITE with auto precharge enabled states,
ACTIVE, PRECHARGE, READ, and WRITE commands to the other bank may be applied; during the access period, only
ACTIVE and PRECHARGE commands to the other bank may be applied. In either case, all other related limitations apply
(e.g., contention between read data and write data must be avoided).
4. AUTO REFRESH and LOAD MODE REGISTER commands may only be issued when all banks are idle.
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current state
only.
6. All states and sequences not shown are illegal or reserved.
7. READs or WRITEs listed in the Command/Action column include READs or WRITEs with auto precharge enabled and READs
or WRITEs with auto precharge disabled.
8. Requires appropriate DM masking.
9. A WRITE command may be applied after the completion of the READ burst; otherwise, a BURST TERMINATE must be
used to end the READ burst prior to asserting a WRITE command.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT46V2M32V1 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V32M16 | 制造商:Micron Technology Inc 功能描述:32MX16 DDR SDRAM PLASTIC IND TEMP BGA 2.6V DDR - Trays |
| MT46V32M16-5B | 制造商:Micron Technology Inc 功能描述: |
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