參數(shù)資料
型號: MT28F320A18
廠商: Micron Technology, Inc.
英文描述: FLASH MEMORY
中文描述: 閃存
文件頁數(shù): 6/37頁
文件大小: 558K
代理商: MT28F320A18
2 MEG x 16
1.8V ENHANCED+ BOOT BLOCK FLASH MEMORY
PRELIMINARY
2 Meg x 16, 1.8V Enhanced+ Boot Block Flash Memory
MT28F320A18_3.fm - Rev. 3, Pub. 9/2002
2002, Micron Technology Inc.
6
BALL DESCRIPTIONS
48-BALL FBGA
NUMBERS
D8, C8, B8, A8,
C7, B7, A7, C6,
B6, A6, C5, B5,
C3, A3, C2, B2,
A2, D1, C1, B1,
A1
D7
SYMBOL
A0–A20
TYPE
Input
DESCRIPTION
Address Inputs: Inputs for the address during READ and WRITE operations.
Addresses are internally latched during WRITE and ERASE cycles.
CE#
Input
Chip Enable: Activates the device when LOW. When CE# is HIGH, the device is
disabled and goes into standby power mode.
Output Enable: Enables the outputs buffer when LOW. When OE# is HIGH, the
output buffers are disabled.
Write Enable: Determines if a given cycle is a WRITE cycle. If WE# is LOW, the cycle
is either a WRITE to the command state machine (CSM) or to the memory array.
Reset: When RP# is a logic LOW, the device is in reset mode, which drives the
outputs to High-Z and resets the write state machine (WSM). When RP# is at logic
HIGH, the device is in standard operation. When RP# transitions from logic LOW
to logic HIGH, the device resets all blocks to locked and defaults to the read array
mode.
Write Protect: Controls the lock down function of the flexible locking feature.
Data Inputs/Outputs: Inputs array data on the second CE# and WE# cycle during
PROGRAM command. Inputs commands to the command user interface when CE#
and WE# are active.
F8
OE#
Input
B3
WE#
Input
B4
RP#
Input
A5
WP#
Input
Input/
Output
E7, F7, D5, E5,
F4, D3, E3, F2,
D6, E6, F6, D4,
E4, F3, D2, E2
A4
DQ0–DQ15
V
PP
Supply
Block Erase and Program Power Supply: [V
PP
1
= 0.9V–1.95V or V
PP
2
= 11.4V–
12.6V]. A valid voltage on this contact allows block erase or data programming.
Memory contents cannot be altered when V
PP
V
PPLK
. Block erase and program
at invalid V
PP
voltages should not be attempted. It provides factory programming
compatibility when driven to 11.4V–12.6V
Device Power Supply: [1.65V–1.95V] Supplies power for device operation.
I/O Power Supply: [1.65V–1.95V] Supplies power for input/output buffers. This
input should be tied directly to V
CC
.
Do not float any ground ball.
Internally not connected.
F5
E1
V
CC
V
CC
Q
Supply
Supply
E8, F1
C4
V
SS
NC
Supply
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