參數(shù)資料
型號(hào): MCTSD01-V100
廠商: Lineage Power
英文描述: SDRAM Controller(同步動(dòng)態(tài)RAM控制器)
中文描述: SDRAM控制器(同步動(dòng)態(tài)內(nèi)存控制器)
文件頁數(shù): 6/12頁
文件大?。?/td> 417K
代理商: MCTSD01-V100
January 99
SDRAM Controller
MACRO
MCTSD01-V100
Data Sheet
Logic Design Solution
6/12
The main features of the the State Machine are as follows:
-
At switch on, the SDRAM should only receive the NOP or the DESL command for 200μs. This is done during the
FPGA configuration phase; pull-up resistor on the printed board generates the NOP command.
-
The Controller should then precharge every cell with the PALL command and generate about ten Auto-refreshes with
the REF command.
-
Then, the SDRAM device is configured with the MRS command. The SDRAM address bits A(11:0) are the data of the
MRS command.
-
The SDRAM Controller is now available as SDRAM device.
-
One REF command arrives every 15,6 μs. This is managed by the SDRAM Controller.
-
SDRAM read and write cycles are performed by the ACT, READP and WRITP command.
-
By default the Controller Auto-Refreshes all addresses after exiting the Self-Refresh mode.
1.5.1
Byte Enable
The DQMU and DQML Enable signals of the 16-bit SDRAM device are generated by the Controller as follows :
BYTE ENABLE
DQML/U
Byte Enable (0)
DQML0
Byte Enable (1)
DQMU0
Byte Enable (2)
DQML1
Byte Enable (3)
DQMU1
Byte Enable (4)
DQML2
Byte Enable (5)
DQMU2
Byte Enable (6)
DQML3
Byte Enable (7)
DQMU3
Microprocessor low address bits should be used to generate the Byte Enable signals.
1.5.1.1
Less than 64 data bits needed
In case the 64-bit wide data is not needed for the customer’s application, the Byte Enable and DQML/U signals not needed
should be put in comments in the VHDL code. The Design Document gives details about this subject.
1.5.1.2
More than 64 data bits needed
In case the customer’s application need more than 64-bit wide data, e.g. 128-bit wide data, the Byte Enable and DQML/U
signals should be multiplied by two. The VHDL code which generates the existing DQML/U signals should be duplicated
and connected to the new Byte Enable signals.
The four low microprocessor address bits should be used to generate the 16-Byte Enable signals. For such application, the
customer has to take care in placing the pins to avoid frequency problems.
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