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參數(shù)資料
| 型號(hào)： | MCHC908RK2CSDR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 181/181頁 |
| 文件大?。?/td> | 2384K |
| 代理商： | MCHC908RK2CSDR2 |
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Keyboard/External Interrupt Module (KBI)
Functional Description
MC68HC908RK2 — Rev. 5.0
Data Sheet
MOTOROLA
Keyboard/External Interrupt Module (KBI)
99
An IRQ/keyboard interrupt is latched when one or more keyboard pins goes low
after all were high. The MODEK bit in the keyboard status and control register
controls the triggering mode of the keyboard interrupt.
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard
pin does not latch an interrupt request if another keyboard pin is already low.
To prevent losing an interrupt request on one pin because another pin is still
low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an interrupt
request is present as long as any keyboard pin is low.
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low
level-sensitive, and both of these actions must occur to clear a keyboard interrupt
request:
Vector fetch or software clear — A vector fetch generates an interrupt
acknowledge signal to clear the interrupt request. Software may generate
the interrupt acknowledge signal by writing a 1 to the ACKK bit in the
keyboard status and control register (INTKBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to
clear the keyboard interrupt request. Writing to the ACKK bit prior to leaving
an interrupt service routine also can prevent spurious interrupts due to
noise. Setting ACKK does not affect subsequent transitions on the keyboard
interrupt pins. A falling edge that occurs after writing to the ACKK bit latches
another interrupt request. If the keyboard interrupt mask bit, IMASKK, is
clear, the CPU loads the program counter with the vector address at
locations $FFFA and $FFFB.
Return of all enabled keyboard interrupt pins to logic 1. As long as any
enabled keyboard interrupt pin is at logic 0, the keyboard interrupt remains
set.
The vector fetch or software clear and the return of all enabled keyboard interrupt
pins to logic 1 may occur in any order.
If the MODEK bit is clear, the keyboard interrupt pin is falling edge-sensitive only.
With MODEK clear, a vector fetch or software clear immediately clears the
keyboard interrupt request.
Reset clears the keyboard interrupt request and the MODEK bit, clearing the
interrupt request even if a keyboard interrupt pin stays at logic 0.
The keyboard flag bit (KEYF) in the IRQ and keyboard status and control register
can be used to see if a pending interrupt exists. The KEYF bit is not affected by the
keyboard interrupt mask bit (IMASKK) which makes it useful in applications where
polling is preferred.
To determine the logic level on a keyboard interrupt pin, use the data direction
register to configure the pin as an input and read the data register.
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