參數(shù)資料
型號(hào)： MCF5481CZP166
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 166.66 MHz, RISC PROCESSOR, PBGA388
封裝： 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-388
文件頁(yè)數(shù)： 35/96頁(yè)
文件大?。?/td> 2006K
代理商： MCF5481CZP166
40
MCF548x Integrated Microprocessor Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Signal Description
1.5.1.12.1 Transmit Serial Data Output (PSC0TXD, PSC1TXD, PSC2TXD,
PSC3TXD)
PSCnTXD are the transmitter serial data outputs for the PSC modules. The output is held high (mark
condition) when the transmitter is disabled, idle, or in the local loopback mode. The PSCxTXD pins can be
programmed to be driven low (break status) by a command.
1.5.1.12.2 Receive Serial Data Input (PSC0RXD, PSC1RXD, PSC2RXD,
PSC3RXD)
PSCnRXD are the receiver serial data inputs for the PSC modules. When the PSC clock is stopped for
power-down mode, any transition on the pins restarts them.
1.5.1.12.3 Clear-to-Send (PSCnCTS/PSCBCLK)
These signals either operate as the clear to send input signals in UART mode or the bit clock input signals
in modem modes and IrDA modes. In MIR and FIR mode, the frequency is a multiple of the input bit clock
frequency, and the bit clock frequency should be within +/-0.1% and +/-0.01% of the ideal one, respectively.
1.5.1.12.4 Request to Send (PSCnRTS/PSCFSYNC)
The PSCnRTS signals act as transmitter request to send (RTS) outputs in UART mode, the frame sync input
in modem8 and modem16 modes or the RTS output (which acts as frame sync) in AC97 modem mode.
1.5.1.13 DMA Controller Module Signals
The DMA controller module uses the signals in the following subsections to provide external requests for
either a source or destination.
1.5.1.13.1 DMA Request (DREQ[1:0])
These inputs are asserted by a peripheral device to request an operand transfer between that peripheral and
memory by either channel 0 or 1 of the on-chip DMA module.
1.5.1.13.2 DMA Acknowledge (DACK[1:0])
These outputs are asserted to acknowledge that a DMA request has been recognized.
1.5.1.14 Timer Module Signals
The signals in the following sections are external interfaces to the four general-purpose MCF548x timers.
These 32-bit timers can capture timer values, trigger external events or internal interrupts, or count external
events.
1.5.1.14.1 Timer Inputs (TIN[3:0])
TINn can be programmed as clocks that cause events in the counter and prescalers. They can also cause
captures on the rising edge, falling edge, or both edges.
相關(guān)PDF資料
PDF描述
MCF5484CZP200 32-BIT, 200 MHz, RISC PROCESSOR, PBGA388
MCF5485CVR200 32-BIT, 200 MHz, RISC PROCESSOR, PBGA388
MCF5483CVR166 32-BIT, 166.66 MHz, RISC PROCESSOR, PBGA388
MCF5481CZP166 32-BIT, 166.66 MHz, RISC PROCESSOR, PBGA388
MCF5484CVR200 32-BIT, 200 MHz, RISC PROCESSOR, PBGA388
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參數(shù)描述
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MCF5482CZP166 功能描述:微處理器 - MPU MCF548X V4ECORE MMU FPU RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MCF5483 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCF548x ColdFire㈢ Microprocessor
MCF5483CVR166 功能描述:微處理器 - MPU MCF548X V4ECORE MMU FPU RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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