
Direct Page Registers
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
29
$0026
TIM Channel 0
Register High (TCH0H)
See page 185.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
$0027
TIM Channel 0
Register Low (TCH0L)
See page 185.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
$0028
TIM Channel 1 Status and
Control Register (TSC1)
See page 183.
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$0029
TIM Channel 1
Register High (TCH1H)
See page 185.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
$002A
TIM Channel 1
Register Low (TCH1L)
See page 185.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
$002B
↓
$0035
Reserved
$0036
Oscillator Status and Control
Register (OSCSC)
See page 108.
Read:
OSCOPT1 OSCOPT0
ICFS1
ICFS0
ECFS1
ECFS0
ECGON
ECGST
Write:
Reset:
0
0
1
0
0
0
0
0
$0037
Reserved
$0038
Oscillator Trim Register
(OSCTRIM)
See page 109.
Read:
TRIM7
TRIM6
TRIM5
TRIM4
TRIM3
TRIM2
TRIM1
TRIM0
Write:
Reset:
1
0
0
0
0
0
0
0
$0039
↓
$003B
Reserved
$003C
ADC10 Status and Control
Register (ADSCR)
See page 52.
Read:
COCO
AIEN
ADCO
ADCH4
ADCH3
ADCH2
ADCH1
ADCH0
Write:
Reset:
0
0
0
1
1
1
1
1
$003D
ADC10 Data Register High
(ADRH)
See page 54.
Read:
0
0
0
0
0
0
AD9
AD8
Write:
R
R
R
R
R
R
R
R
Reset:
0
0
0
0
0
0
0
0
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
=Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 7)