
Timer Interface Module (TIM)
MC68HC908QL4  MC68HC908QL3  MC68HC908QL2 Data Sheet, Rev. 4
182
Freescale Semiconductor
NOTE
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by 
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL 
retains the value latched during the break.
15.8.3  TIM Counter Modulo Registers 
The read/write TIM modulo registers contain the modulo value for the counter. When the counter reaches 
the modulo value, the overflow flag (TOF) becomes set, and the counter resumes counting from $0000 
at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow interrupts until 
the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
NOTE
Reset the counter before writing to the TIM counter modulo registers.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
0
0
0
0
0
0
0
0
Figure 15-5. TIM Counter High Register (TCNTH)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 15-6. TIM Counter Low Register (TCNTL)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Write:
Reset:
1
1
1
1
1
1
1
1
Figure 15-7. TIM Counter Modulo High Register (TMODH)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Write:
Reset:
1
1
1
1
1
1
1
1
Figure 15-8. TIM Counter Modulo Low Register (TMODL)