- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371076 > MC908QL2C (Motorola, Inc.) Microcontrollers PDF資料下載
參數(shù)資料
| 型號(hào)： | MC908QL2C |
| 廠商： | Motorola, Inc. |
| 英文描述： | Microcontrollers |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 137/222頁 |
| 文件大小： | 2861K |
| 代理商： | MC908QL2C |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁當(dāng)前第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁
Modes of Operation
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
137
LVR, POR, COP watchdog, RST pin, etc.) is asserted. SLIC reset mode may also be entered by the user
software by asserting the INITREQ bit. INITACK indicates whether the SLIC module is in the reset mode
as a result of writing INITREQ in SLCC1. While in the reset state the SLIC module clocks are stopped.
Clearing the INITREQ allows the SLIC to proceed and enter SLIC run mode (if SLCE is set). The module
will clear INITACK after the module has left reset mode and the SLIC will seek the next LIN header. It is
the responsibility of the user to verify that this operation is compatible with the application before
implementing this feature.
In this mode, the internal SLIC module voltage references are operative, V
DD
is supplied to the internal
circuits, which are held in their reset state and the internal SLIC module system clock is running. Registers
will assume their reset condition. Outputs are held in their programmed reset state, inputs and network
activity are ignored.
14.5.3 SLIC Disabled
This mode is entered from the reset mode after all MCU reset sources are no longer asserted or INITREQ
is cleared by the user and the SLIC module clears INITACK. It is entered from the run mode whenever
SLCE in SLCC2 is cleared. In this mode the SLIC clock is stopped to conserve power and allow the SLIC
module to be configured for proper operation on the LIN bus.
14.5.4 SLIC Run
This mode is entered from the SLIC disabled mode when SLCE in SLCC2 is set. It is entered from the
SLIC wait mode whenever activity is sensed on the LIN bus or some other MCU source wakes the CPU
out of wait mode.
It is entered from the SLIC stop mode whenever network activity is sensed or some other MCU source
wakes the CPU out of stop mode. Messages will not be received properly until the clocks have stabilized
and the CPU is also in the run mode.
14.5.5 SLIC Wait
This power conserving mode is automatically entered from the run mode whenever the CPU executes a
WAIT instruction and SLCWCM in SLCC1 is previously cleared. In this mode, the SLIC module internal
clocks continue to run. Any activity on the LIN network will cause the SLIC module to exit SLIC wait mode
and return to SLIC run.
14.5.6 Wakeup from SLIC Wait with CPU in WAIT
If the CPU executes the WAIT instruction and the SLIC module enters the wait mode (SLCWCM = 0), the
clocks to the SLIC module as well as the clocks in the MCU continue to run. Therefore, the message that
wakes up the SLIC module from WAIT and the CPU from wait mode will also be received correctly by the
SLIC module. This is because all of the required clocks continue to run in the SLIC module in wait mode.
14.5.7 SLIC Stop
This power conserving mode is automatically entered from the run mode whenever the CPU executes a
STOP instruction, or if the CPU executes a WAIT instruction and SLCWCM in SLCC1 is previously set.
In this mode, the SLIC internal clocks are stopped. Any activity on the network will cause the SLIC module
to exit SLIC stop mode and generate an unmaskable interrupt of the CPU. This wakeup interrupt state is
reflected in the SLCSV, encoded as the highest priority interrupt. This interrupt can be cleared by the CPU
with a read of the SLCSV and clearing of the SLCF interrupt flag. Depending upon which low-power mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC908QL2DT | Microcontrollers |
| MC908QL2DW | Microcontrollers |
| MC908QL2M | Microcontrollers |
| MC908QL2V | Microcontrollers |
| MC908QL4DT | Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC908QL2DT | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Microcontrollers |
| MC908QL2DW | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Microcontrollers |
| MC908QL2M | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Microcontrollers |
| MC908QL2V | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Microcontrollers |
| MC908QL3C | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Microcontrollers |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。