
Input/Output Ports (PORTS)
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
116
Freescale Semiconductor
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
PTBPUE[7:0] — Port B Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on port B pins
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
12.3.4 Port B Summary Table
The following table summarizes the operation of the port A pins when used as a general-purpose
input/output pins.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTBPUE7
PTBPUE6
PTBPUE5
PTBPUE4
PTBPUE3
PTBPUE2
PTBPUE2
PTBPUE0
Write:
Reset:
0
0
0
0
0
0
0
0
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
Table 12-2. Port B Pin Functions
DDRB
Bit
PTB
Bit
I/O Pin
Mode
Accesses to DDRB
Read/Write
Accesses to PTB
Read
Write
0
X
(1)
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect the input.
Input, Hi-Z
(2)
DDRB7–DDRB0
Pin
PTB7–PTB0
(3)
1
X
Output
DDRB7–DDRB0
Pin
PTB7–PTB0