
Initialization/Application Information
MC68HC908QL4  MC68HC908QL3  MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
165
14.9.15  Byte Transfer Mode Operation
This subsection describes the operation and limitations of the optional UART-like byte transfer mode 
(BTM). This mode allows sending and receiving individual bytes, but changes the behavior of the SLCBT 
registers (now read/write registers) and locks the SLCDLC to 1 byte data length. The SLCBT value now 
becomes the bit time reference for the SLIC, where the software sets the length of one bit time rather than 
the SLIC module itself. This is similar to an input capture/output compare (IC/OC) count in a timer module, 
where the count value represents the number of SLIC clock counts in one bit time.
Byte transfer mode assumes that the user has a very stable, precise oscillator, resonator, or clock 
reference input into the MCU and is therefore not appropriate for use with internal oscillators. There is no 
synchronization method available to the user in this mode and the user must tell the SLIC how many clock 
counts comprise a bit time. 
Figure 14-18
, 
Figure 14-19
, 
Figure 14-20
, and 
Figure 14-21
 show calculations 
to determine the SLCBT value for different settings.
NOTE
It is possible to use the LIN autobauding circuitry in a non-LIN system to 
derive the correct bit timing values if system constraints allow. To do this 
the SLIC module must be activated in LIN mode (BTM=0) and receive a 
break symbol, 0x55 data byte and one additional data byte (at the desired 
BTM speed). Upon receiving this sequence of symbols which appears to be 
a LIN header, the SLIC module will assert an ID received successfully 
interrupt (SLCSV=0x2C). The value in the SLCBT registers will reflect the 
bit rate which the 0x55 data character was received and can be saved to 
RAM. The user then switches the SLIC into BTM mode and reloads this 
value from RAM and the SLIC will be configured to communicate in BTM 
mode at the baud rate which the 0x55 data character was sent.
In the example in 
Figure 14-18
, the user should write 0x16, as a write of 0x15 (decimal value of 21) would 
automatically revert to 0x14, resulting in transmitted bit times that are 1.33 SLIC clock periods too short 
rather than 0.667 SLIC clock periods too long. The optimal choice, which gives the smallest resolution 
error, is the closest even number of SLIC clocks to the exact calculated SLCBT value.
There is a trade-off between maximum bit rate and resolution with the SLIC in BTM mode. Faster SLIC 
clock speeds improve resolution, but require higher numbers to be written to the SLCBT registers for a 
given desired bit rate. It is up to the user to determine what level of resolution is acceptable for the given 
application.
Figure 14-18. SLCBT Value Calculation Example 1
4 CGMXCLK Period
21.33 SLIC Clock Periods
1 Bit
1 SLIC Clock Period
1 SLIC Clock Period
813.802 ns
X
=
1 SLIC Clock Period
=
813.802 ns
1 Second
57,600 Bits
=
17.36111 ms
1 Bit
4,915,200 CGMXCLK Periods
1 Second
X
17.36111 ms
1 Bit
Desired Bit Rate:                      57,600 bps
External Crystal Frequency:     4.9152 MHz
Therefore, the closest SLCBT value would be 21 SLIC clocks (SLCBT = 0x0015).
Because you can only use even values in SLCBT, the closest acceptable value is 22 (0x0016).