參數(shù)資料
型號: MC68HC705C9ACP
廠商: Freescale Semiconductor
文件頁數(shù): 78/118頁
文件大?。?/td> 0K
描述: IC MCU 2.1MHZ 16K OTP 40-DIP
標(biāo)準(zhǔn)包裝: 9
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 24
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: OTP
RAM 容量: 352 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
Serial Communications Interface (SCI)
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
62
Freescale Semiconductor
9.6 Data Format
Receive data or transmit data is the serial data that is transferred to the internal data bus from the receive
data input pin (RDI) or from the internal bus to the transmit data output pin (TDO). The non-return-to-zero
(NRZ) data format shown in Figure 9-3 is used and must meet the following criteria:
The idle line is brought to a logic 1 state prior to transmission/reception of a character.
A start bit (logic 0) is used to indicate the start of a frame.
The data is transmitted and received least significant bit first.
A stop bit (logic 1) is used to indicate the end of a frame. A frame consists of a start bit, a character
of eight or nine data bits, and a stop bit.
A break is defined as the transmission or reception of a low (logic 0) for at least one complete frame
time.
Figure 9-3. Data Format
9.7 Receiver Wakeup Operation
The receiver logic hardware also supports a receiver wakeup function which is intended for systems
having more than one receiver. With this function a transmitting device directs messages to an individual
receiver or group of receivers by passing addressing information as the initial byte(s) of each message.
The wakeup function allows receivers not addressed to remain in a dormant state for the remainder of the
unwanted message. This eliminates any further software overhead to service the remaining characters of
the unwanted message and thus improves system performance.
The receiver is placed in wakeup mode by setting the receiver wakeup bit (RWU) in the SCCR2 register.
While RWU is set, all of the receiver-related status flags (RDRF, IDLE, OR, NF, and FE) are inhibited
(cannot become set).
NOTE
The idle line detect function is inhibited while the RWU bit is set. Although
RWU may be cleared by a software write to SCCR2, it would be unusual to
do so.
Normally, RWU is set by software and is cleared automatically in hardware by one of these methods: idle
line wakeup or address mark wakeup.
9.8 Idle Line Wakeup
In idle line wakeup mode, a dormant receiver wakes up as soon as the RDI line becomes idle. Idle is
defined as a continuous logic high level on the RDI line for 10 (or 11) full bit times. Systems using this
type of wakeup must provide at least one character time of idle between messages to wake up sleeping
receivers, but must not allow any idle time between characters within a message.
IDLE LINE
012345678
0
STOP START
START
CONTROL BIT M SELECTS
8- OR 9-BIT DATA
相關(guān)PDF資料
PDF描述
MC68HC705C9ACFN IC MCU 2.1MHZ 16K OTP 44-PLCC
EHFWX2PKG CONN EEE1394 FMAL T/H CROSS BLK
EHFW2BXPKG CONN EEE1394 FMALE T/H BLK 4-40
P87C52X2FA,512 IC 80C51 MCU 8K OTP 44-PLCC
R5F1007EANA#U0 MCU 16BIT 64KB FLASH 24WQFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC705C9ACPE 制造商:Freescale Semiconductor 功能描述:
MC68HC705C9AFNE 功能描述:8位微控制器 -MCU 8B MCU 352 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC705C9AVFNE 功能描述:8位微控制器 -MCU 8B MCU 352 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC705E6CDW 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
MC68HC705G1B 制造商:Rochester Electronics LLC 功能描述:- Bulk