參數(shù)資料
型號： MC68HC705C9ACP
廠商： Freescale Semiconductor
文件頁數(shù)： 48/118頁
文件大?。?/td> 0K
描述： IC MCU 2.1MHZ 16K OTP 40-DIP
標(biāo)準(zhǔn)包裝： 9
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 24
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 352 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
35
Chapter 4
Interrupts
4.1 Introduction
The MCU can be interrupted by five different sources, four maskable hardware interrupts, and one
non-maskable software interrupt:
External signal on the IRQ pin or port B pins
16-bit programmable timer
Serial communications interface
Serial peripheral interface
Software interrupt instruction (SWI)
Interrupts cause the processor to save register contents on the stack and to set the interrupt mask (I bit)
to prevent additional interrupts. The RTI instruction causes the register contents to be recovered from the
stack and normal processing to resume.
Unlike reset, hardware interrupts do not cause the current instruction execution to be halted, but are
considered pending until the current instruction is complete.
NOTE
The current instruction is the one already fetched and being operated on.
When the current instruction is complete, the processor checks all pending hardware interrupts. If
interrupts are not masked (CCR I bit clear) and if the corresponding interrupt enable bit is set, the
processor proceeds with interrupt processing; otherwise, the next instruction is fetched and executed.
If an external interrupt and a timer, SCI, or SPI interrupt are pending at the end of an instruction execution,
the external interrupt is serviced first. The SWI is executed the same as any other instruction, regardless
of the I-bit state.
Table 4-1 shows the relative priority of all the possible interrupt sources. Figure 4-1 shows the interrupt
processing flow.
4.2 Non-Maskable Software Interrupt (SWI)
The SWI is an executable instruction and a non-maskable interrupt: It is executed regardless of the state
of the I bit in the CCR. If the I bit is zero (interrupts enabled), SWI executes after interrupts which were
pending when the SWI was fetched, but before interrupts generated after the SWI was fetched. The
interrupt service routine address is specified by the contents of memory locations $3FFC and $3FFD.
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MC68HC705C9ACPE 制造商:Freescale Semiconductor 功能描述:
MC68HC705C9AFNE 功能描述:8位微控制器 -MCU 8B MCU 352 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC705C9AVFNE 功能描述:8位微控制器 -MCU 8B MCU 352 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC705E6CDW 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
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