參數(shù)資料
型號: MC68HC05C0B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 4 MHz, MICROCONTROLLER, PDIP42
封裝: SDIP-42
文件頁數(shù): 69/96頁
文件大小: 357K
代理商: MC68HC05C0B
MOTOROLA
Section 12: Serial Communications Interface
Page 62
MC68HC05C0 Specification Rev. 1.2
A system must include both RDI (receive data in) and TDO (transmit data out) signals.
12.2
DATA FORMAT
Receive data in (RDI) is the serial data that is transferred to the internal data bus from the
receive data input pin (RDI). Transmit data out (TDO) is the serial data that is transferred
from the internal bus to the transmit data output pin (TDO). The non-return-to-zero (NRZ)
data format shown in Figure 12-1is used and must meet the following criteria:
A high level indicates a logic one and a low level indicates a logic zero.
The idle line is brought to a logic one state prior to transmission/reception
of a character.
A frame consists of a start bit, a character of eight or nine data bits, and a
stop bit.
A start bit (logic zero) is used to indicate the start of a frame.
A stop bit (logic one) is used to indicate the end of a frame.
The data is transmitted and received least significant bit first.
A break is defined as the transmission or reception of a low (logic zero)
for at least one complete frame time.
A preamble is defined as the transmission or reception of a high (logic
one) for one complete frame time after software enables the transmitter.
Figure 12-1: Data Format
12.3
FUNCTIONAL DESCRIPTION
A block diagram of the SCI is shown in Figure 12-2. The user has option bits in serial
control register 1 (SCCR1) to select the “wake-up” method (WAKE bit) and data word
length (M bit) of the SCI. Serial communications control register 2 (SCCR2) provides
control bits which individually enable/disable the transmitter or receiver (TE and RE,
respectively), enable system interrupts (TIE, TCIE, RIE, ILIE), provide the wake-up enable
bit (RWU) and the send break code bit (SBK). Control bits in the baud rate register
(SCP1:0, SCT2:0, SCR2:0) allow the user to select different baud rates for the transmitter
and receiver.
0
1234567
8
0
START
STOP*
START
IDLE LINE
* STOP BIT IS ALWAYS HIGH
CONTROL BIT “M”
SELECTS 8 OR 9 BIT DATA
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